---
title: 'Architect at Delos Data Inc'
canonical: 'https://feeny.ai/job/architect-delos-data-inc-palo-alto-50f77qzj5ewp'
type: 'job'
last_seen: '2026-11-03'
---

# Architect at Delos Data Inc

- **Company:** Delos Data Inc
- **Location:** Palo Alto, CA
- **Employment:** full-time
- **Work type:** hybrid
- **Posted:** 2026-10-30
- **Last confirmed live:** 2026-11-03
- **Apply:** https://jobs.ashbyhq.com/delos-data/f1e598f3-944a-4890-a4a7-f108d9f5509b

## Job description

ASIC Architect We are seeking a highly skilled and visionary ASIC Architect to define, architect, and guide the development of next-generation, high-performance ASICs. As a key technical leader, you will translate high-level system requirements into detailed architectural specifications, balancing power, performance, and area (PPA) trade-offs. Who we are: We are a startup building foundational technology to address performance, scalability, and resiliency challenges in large-scale AI data center clusters. We are backed by top-tier VC firms and notable angel investors. The company is led by experienced builders and operators who have founded companies, taken them to scale, and exited successfully. We work with a strong sense of unity and shared responsibility, and we expect trust, integrity, and respect in how we collaborate and make decisions. We hold ourselves accountable to one another and to the quality of the work we deliver. Headquartered in Silicon Valley, we operate across a mix of remote and on-site locations in the U.S. and Canada. We aim to create an environment where people are treated fairly, supported in their growth, and are empowered to do meaningful work alongside others who take the craft seriously.

What we need: We are seeking a highly skilled and visionary ASIC Architect to define, architect, and guide the development of next-generation, high-performance ASICs. As a key technical leader, you will translate high-level system requirements into detailed architectural specifications, balancing power, performance, and area (PPA) trade-offs. You will work across teams to define the architecture for IP blocks, sub-systems, and full SoC integration for advanced AI accelerators, networking, and datacenter computing workloads.

Key Responsibilities:

- Lead the creation of Architectural Design Specifications (ADS) and Micro-architecture Specifications (MAS) for complex ASICs including high-speed interconnect fabric and IO protocols (Ethernet, PCIe, UCIe).
- Develop high-level performance models (using SystemC/TLM, C++, or Python) to analyze workload behaviors and validate architectural assumptions.
- Optimize chip-level and block-level architecture to meet stringent power, performance, and area goals.
- Partner with RTL design, verification, physical design, firmware, and software teams to ensure seamless implementation and validation.
- Drive architectural trade-off studies and lead design reviews.
- Define advanced power management strategies including DVFS, power domains, and clock gating.
- Mentor junior engineers and contribute to technical leadership across the organization.

Required Skills and Qualifications:

- Bachelor’s degree in Electrical Engineering, Computer Engineering, or Computer Science
- 7+ years of experience in ASIC architecture, micro-architecture, or high-level design.
- Strong proficiency in SystemVerilog/Verilog and C/C++ or SystemC for modeling.
- Deep knowledge of computer architecture, including CPU/GPU cores, caches, fabric, and memory hierarchies.
- Experience with industry-standard protocols such as Ethernet, PCIe or UAL.
- Familiarity with EDA tools such as Synopsys Design Compiler, Cadence Genus, or similar.
- Experience with performance modeling and analysis tools.

Desired Skills:

- Master’s degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science.
- Experience designing AI/ML accelerators or high-performance networking silicon.
- Proven record of shipping high-performance silicon from concept to tape-out.
- Familiarity with pre-silicon emulation platforms.
- Strong scripting skills (Python, Tcl, Perl) for automation.
- Excellent communication skills and ability to articulate complex architectural concepts.
- Proactive problem solver capable of working with minimal oversight.
- Strong leadership and mentorship capabilities

Compensation: Target base salary for this role is $160,000 - $280,000 per year + meaningful equity + benefits + 401k. Our salary ranges are determined by role, level, experience, and location.

Agency Note: We do not accept resumes from agencies or search firms. Please do not forward candidate profiles through our careers page, email, LinkedIn messages, or directly to company employees. Any resumes submitted will be deemed the property of the company, and no fees will be paid in the event the candidate is hired.

## About Delos Data Inc

## Company Overview
- **One-liner**: Delos Data builds a new interconnect architecture and server design purpose-built for AI inference, enabling faster, more scalable inference by eliminating network bottlenecks.
- **Entity Type**: Private (Stealth/Seed stage)
- **Headquarters**: Palo Alto, California, USA
- **Founded**: 2025
- **Founders**: Ed Doe (CEO & Co-Founder), Dan Daly (CTO & Co-Founder)

## Core Business
- **Primary Industry**: Semiconductor Manufacturing / AI Infrastructure
- **Target Customers**: Hyperscalers, AI infrastructure builders, and enterprises scaling AI inference workloads (B2B)
- **Mission/Purpose**: To deliver the world's most capable and responsive intelligence by building an interconnect purpose-built for AI inference, not borrowed from HPC, cloud, or training.

## Products & Services
- **Nonstop AI™**: A new cluster architecture and server design that accelerates AI inference through cabled scale-up. It reduces GPU idle time caused by data center interconnect bottlenecks and is designed to flexibly scale to thousands of GPUs, CPUs, and accelerators.
- **Delos Server**: Brings scale-up IO to the network fabric, enabling larger scale-up domains for inference.
- **Delos Mosaic™**: Software providing fine-grained visibility into the scale-up domain, allowing for real-time inference bottleneck detection and AI workload tuning.

## Market Standing
- **Valuation**: Not publicly disclosed (Private, early-stage company)
- **Key Metric**: Total funding not publicly disclosed; company is in early access deployment with select customers.
- **Notable Investors/Partners**: Not publicly disclosed; company exhibited at NVIDIA GTC 2026 (Booth 150) and will demonstrate at Computex 2026 (Booth J1328).
- **Growth Signals**: 
  - Founded in 2025, already has 3 employees with 25% monthly headcount growth.
  - 7 active job postings as of mid-2026.
  - Announced Nonstop AI™ architecture in May 2026 with early access deployments.
  - Exhibited at major industry events (NVIDIA GTC 2026, Computex 2026).
  - Website traffic growing 39.4% month-over-month.

## Competitive Advantages
- **Purpose-built for inference**: Unlike competitors who borrow interconnects from HPC, cloud, or training, Delos Data builds an interconnect specifically designed for AI inference workloads.
- **Cabled scale-up architecture**: Enables flexible scaling to thousands of GPUs, CPUs, and accelerators, reducing GPU idle time caused by network bottlenecks.
- **Full-stack approach**: Combines hardware (Delos Server), software (Delos Mosaic™), and silicon expertise to deliver a unified system-level solution.
- **Ecosystem compatibility**: Built to work within today's GPU and accelerator ecosystems, making adoption easier for hyperscalers and enterprises.
- **Founding team pedigree**: CTO Dan Daly and CEO Ed Doe bring deep expertise from leading semiconductor and AI companies.

## Strategic Focus
- **Product launch and market entry**: Currently in early access with select customers, with broader availability planned for Q4 2026.
- **Scaling the team**: Actively hiring across engineering (system software, DFT, verification, SDET), advanced packaging, and people operations roles.
- **Building the brand**: Establishing presence at major industry events (NVIDIA GTC, Computex) to build credibility and attract top talent.
- **Targeting hyperscalers and AI infrastructure builders**: The primary customer base for the Nonstop AI™ architecture.

## Why Work Here
- **Mission-driven work**: Opportunity to build foundational infrastructure for the next generation of AI, working on a problem the founders describe as "the next leap in AI performance."
- **Early-stage impact**: Join a company founded in 2025 with only 3 employees, offering significant ownership and influence over product and culture.
- **Hybrid/Remote flexibility**: Roles are listed as both remote and hybrid (Palo Alto, CA and Montréal, QC, CAN), with a "Remote Workspace" designation for many positions.
- **Founding team**: Work directly under experienced leadership (CTO Dan Daly, CEO Ed Doe) with deep expertise in semiconductors and AI.
- **Cutting-edge tech stack**: Work with Kubernetes, PyTorch, CUDA, SystemVerilog, Python, Terraform, and more across hardware and software domains.
- **High-growth trajectory**: 25% monthly headcount growth, active hiring across 7+ roles, and strong momentum from major industry events.

## Sources
1. [delosdata.com](https://delosdata.com/)
2. [builtin.com](https://builtin.com/company/delos-data)
3. [linkedin.com](https://www.linkedin.com/company/delosdata)
4. [delosdata.com/press](https://www.delosdata.com/press/faster-ai-inference-enabled-by-1000x-higher-scale-with-delos-data-nonstop-ai)
5. [opencorpdata.com](https://opencorpdata.com/us-va/11860584)

## Other roles at Delos Data Inc

- [AI Infrastructure Engineer](https://feeny.ai/job/ai-infrastructure-engineer-delos-data-inc-cambridge-pq4kk9efmrc9) — Cambridge, MA
- [RTL Design Engineer](https://feeny.ai/job/rtl-design-engineer-delos-data-inc-palo-alto-646y3xe9876r) — Palo Alto, CA
- [Verification Engineer](https://feeny.ai/job/verification-engineer-delos-data-inc-palo-alto-rg1anvpfs5px) — Palo Alto, CA
- [System Software Engineer - AI](https://feeny.ai/job/system-software-engineer-ai-delos-data-inc-montreal-rpy5eqj29k80) — Montréal, Canada
- [Software Development Engineer in Test - AI](https://feeny.ai/job/software-development-engineer-in-test-ai-delos-data-inc-montreal-k0g110pt6p2h) — Montréal, Canada
- [Forward Deployed Engineer](https://feeny.ai/job/forward-deployed-engineer-delos-data-inc-cambridge-ym3ff1640191) — Cambridge, MA
- [Senior Electrical Engineer, Server Hardware 資深伺服器硬體工程師](https://feeny.ai/job/senior-electrical-engineer-server-hardware-delos-data-inc-taiwan-sj99t7zk0r06) — Taiwan
- [Principal Package Engineer](https://feeny.ai/job/principal-package-engineer-delos-data-inc-palo-alto-w5bhyzdw878e) — Palo Alto, CA
- [DFT Engineer](https://feeny.ai/job/dft-engineer-delos-data-inc-palo-alto-2v1vtamcm885) — Palo Alto, CA
- [SerDes Validation Leader](https://feeny.ai/job/serdes-validation-leader-delos-data-inc-palo-alto-cgr5a14pkbw8) — Palo Alto, CA