--- title: 'Automotive MCU Chip Architect at Hop' canonical: 'https://feeny.ai/job/automotive-mcu-chip-architect-hop-duesseldorf-je6nftbh4adz' type: 'job' last_seen: '2026-09-09' --- # Automotive MCU Chip Architect at Hop - **Company:** Hop - **Location:** Duesseldorf, Germany - **Employment:** full-time - **Work type:** onsite - **Posted:** 2026-07-09 - **Last confirmed live:** 2026-09-09 - **Apply:** https://jobs.lever.co/hophr/d7f34c62-1fef-434e-baee-42d835fd3027 ## Job description We are looking for an experienced Automotive MCU Chip Architect to define the system and subsystem architecture of next-generation automotive microcontrollers. The role includes ownership of chip-level architecture concepts, subsystem partitioning, compute and memory architecture, interconnect strategy, safety and security integration, power/reset/clock concepts, and hardware/software interface definition. The successful candidate will work closely with product management, safety, security, design, verification, software, and implementation teams to ensure the MCU architecture meets demanding automotive requirements for real-time performance, functional safety, cybersecurity, reliability, scalability, and cost efficiency. ## What you'll do ## Key Responsibilities System Architecture Definition - Define the overall automotive MCU architecture from product, customer, and market requirements. - Translate use cases into chip-level requirements covering performance, safety, security, power, cost, and scalability. - Drive system partitioning across CPUs, memories, interconnects, peripherals, safety/security functions, debug, test, and power domains. - Own architecture trade-offs and document decision rationale for reuse across MCU families and derivatives. Subsystem Architecture Ownership - Align subsystem concepts and interfaces across compute, memory, bus/interconnect, peripheral, safety, security, power/reset/clock, debug/trace, and DFT/test domains. - Ensure subsystem requirements are implementation-feasible and verifiable at RTL, subsystem, chip, silicon, and software levels. - Define hardware/software-visible architecture elements such as memory maps, register model principles, interrupts, DMA, boot flow, and access-control concepts. Cross-Functional Technical Leadership - Lead architecture reviews and resolve trade-offs between product management, system engineering, safety, security, design, verification, software, backend, test, and validation teams. - Provide technical guidance during concept, design, verification, silicon bring-up, qualification, and customer support phases. - Ensure architectural consistency, requirement traceability, and risk closure across global engineering teams. ## What we require Required Technical Expertise MCU / SoC Architecture - Deep understanding of real-time MCU architectures, CPU subsystems, memories, peripheral integration, low-power design, product-family scalability, and silicon implementation constraints. Automotive Functional Safety - Practical ISO 26262 expertise including ASIL concepts, safety goals, technical safety requirements, FMEDA/DFA/FTA awareness, and definition of safety mechanisms at system and subsystem level. Automotive Cybersecurity - Understanding of secure boot, hardware root of trust, HSM integration, cryptographic accelerators, key management, lifecycle states, secure debug, and ISO/SAE 21434 concepts. Digital Design and Implementation Awareness - Ability to reason about RTL feasibility, timing, area, power, DFT, backend constraints, IP integration, verification closure, and bring-up observability. Embedded Software Awareness - Working knowledge of startup software, boot flows, drivers, AUTOSAR concepts, RTOS use, interrupts, memory protection, debug, and software-visible register behavior. Required Experience - 10+ years in semiconductor, MCU, SoC, or embedded systems development. - Several years in system architecture, subsystem architecture, or senior technical leadership. - Hands-on experience with automotive MCU or automotive SoC products. - Experience across concept definition, architecture specification, design support, verification support, silicon bring-up, qualification, and customer support. - Proven ability to work with international and cross-functional engineering teams. ## About Hop ## Company Overview - **One-liner**: Hop (HopHR) is a recruitment platform that connects U.S. companies with pre-vetted AI, machine learning, and data science talent from Latin America. - **Entity Type**: Private (Bootstrapped) - **Headquarters**: Walnut Creek, California, United States - **Founded**: 2016 - **Founders**: Nazli Nadem and Arash Sohrabian ## Core Business - **Primary industry/industries**: Staffing and Recruiting (specialized in AI/ML and data science talent) - **Target customers**: B2B – startups to Fortune 500 companies seeking technical talent, especially in AI, machine learning, and data engineering - **Mission or purpose statement**: “Break geographic barriers, giving global talent access to high-paying, future-focused roles” and promote diversity in tech hiring. ## Products & Services - **Recruitment Platform**: AI-driven matching and vetting platform that evaluates candidates using proprietary technology; only top 1 in 500 talents are selected. - **Direct Hire**: Full-time placement of pre-vetted engineers (AI/ML, data science, full-stack, MLOps, etc.) with a 16-day selection process. - **Contract-to-Hire**: Trial period engagements before committing to a full-time offer. - **Team Augmentation**: On-demand scaling of engineering capacity with LATAM-based talent working in U.S. time zones. ## Market Standing - **Valuation/Market Cap**: Not disclosed - **Key Metric**: Headcount of 16 employees (+12.5% YoY); talent pool of over 100,000 data science and AI professionals worldwide (including 35,000+ women in tech) - **Notable Investors/Partners**: No disclosed investors; trusted by startups and Fortune 500 companies; featured in Forbes. - **Growth Signals**: 80% client return rate; LinkedIn followers growing +10.5% yearly; expanding marketing team (hiring Marketing Manager as of Sep 2024). ## Competitive Advantages - **LATAM Focus**: Timezone-aligned talent (mostly Latin America) enabling real-time collaboration at lower cost compared to U.S.-based hires. - **Rigorous Vetting**: Proprietary 16-day evaluation covering technical skills, communication, and cultural fit; only top 1 in 500 candidates pass. - **Diversity Commitment**: Actively promotes hiring of women and underrepresented groups in tech; over 35,000 women in their talent pool. - **AI-Powered Matching**: Uses machine learning algorithms and a human-segmented database to surface the best candidates quickly. ## Strategic Focus - **Geographic Expansion**: Continue breaking barriers by connecting LATAM talent with U.S. companies, with a goal to uplift communities. - **AI Talent Specialization**: Deepening expertise in generative AI, LLMs, and MLOps to meet growing demand. - **Scalability**: Offering flexible engagement models (direct hire, contract-to-hire, augmentation) to adapt to client needs. ## Why Work Here - **Culture**: Rated 4.2/5.0 on employer reviews (Culture: 4.3, Career: 4.3, Compensation: 3.8). Described as “zestful,” encouraging bold initiatives and diversity. - **Work Mode**: Hybrid workspace – employees engage in a combination of remote and on-site work. - **Notable Perks**: Focus on professional growth; access to top mentors and training on ethics, work culture, and self-mastery. - **Engineering Culture**: Emphasis on using AI tools to enhance recruitment, with a tech-forward approach and a small, distributed team (16 people across 6 countries). ## Sources 1. [LinkedIn – Hop](https://linkedin.com/company/hophr) 2. [HopHR About Page](https://hophr.com/about) 3. [HopHR Services Page](https://hophr.com/services) 4. [Built In – HopHR Careers](https://builtin.com/company/hophr) 5. [HopHR Jobs on Lever](https://jobs.lever.co/hophr) ## Other roles at Hop - [Lead Product Manager](https://feeny.ai/job/lead-product-manager-hop-new-york-bz4zr7m451bn) — New York, NY - [HPC Sr Staff Engineer, Test Jig Core Technology Development](https://feeny.ai/job/hpc-sr-staff-engineer-test-jig-core-technology-development-hop-japan-8g8f6mx40sbb) — Japan - [HPC SoC Timing Design Engineer/Leader](https://feeny.ai/job/hpc-soc-timing-design-engineer-leader-hop-japan-fzxfhke4zj5h) — Japan - [Principal Engineer, Application Engineering (f/m/d)](https://feeny.ai/job/principal-engineer-application-engineering-f-m-d-hop-munich-7ahbxvmj1bw3) — Munich, Germany - [Staff/Sr Staff, Automotive MCU Product Marketing (HPC)](https://feeny.ai/job/staff-sr-staff-automotive-mcu-product-marketing-hpc-hop-duesseldorf-3k7jewzd4mra) — Duesseldorf, Germany - [Senior Director, Physical Design & Backend Engineering (HPC)](https://feeny.ai/job/senior-director-physical-design-backend-engineering-hpc-hop-austin-7cchhvz44ep3) — Austin, TX - [Automotive MCU Business Development Marketing Director/Sr. Manager](https://feeny.ai/job/automotive-mcu-business-development-marketing-director-sr-manager-hop-japan-70k9899m8nps) — Japan - [Chief of Staff to SVP](https://feeny.ai/job/chief-of-staff-to-svp-hop-remote-zbm1kq7zfzwa) - [Full Stack Software Engineer](https://feeny.ai/job/full-stack-software-engineer-hop-los-angeles-s6n3xjwpfyq4) — Los Angeles, CA - [Full Stack Software Engineer](https://feeny.ai/job/full-stack-software-engineer-hop-los-angeles-dsat1b74gxyj) — Los Angeles, CA