---
title: 'Compiler Engineer - Algorithmic Workloads Compilation at Mythic'
canonical: 'https://feeny.ai/job/compiler-engineer-algorithmic-workloads-compilation-mythic-palo-alto-hgwjyzakq7pm'
type: 'job'
last_seen: '2026-09-07'
---

# Compiler Engineer - Algorithmic Workloads Compilation at Mythic

- **Company:** Mythic
- **Location:** Palo Alto, CA
- **Employment:** full-time
- **Work type:** remote
- **Posted:** 2025-10-03
- **Last confirmed live:** 2026-09-07
- **Apply:** https://jobs.lever.co/mythic-ai.com/0cfba177-a646-48da-9ced-4c33ea1c108a

## Job description

## About us

Mythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications—whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.

We’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.

## About the role

Help push the boundaries of what can run on our accelerator. You’ll design compiler IRs and lowering strategies to support algorithmic workloads with irregular or dynamic control flow—loops, branches, and iterative methods—going beyond static neural networks. Working side by side with hardware engineers, you’ll influence ISA and execution model co-design to unlock new algorithm classes on analog and digital subsystems. The result: a compiler that makes complex algorithms practical to deploy while staying seamless for developers.

Here's what you will do

- Extend compiler IRs to represent algorithms not easily captured in DNN graphs including control flow and iterative computation
- Develop compilation strategies that unify analog compute with digital subsystems while maintaining performance and correctness
- Prototype and optimize algorithms with irregular or dynamic control flow in compiler IRs, applying techniques such as vectorization, predication, and scheduling
- Collaborate with hardware engineers to co-design ISA and features that improve support for algorithmic workloads
- Define a roadmap for higher-level programming abstractions that simplify prototyping and accelerate deployment

Here's the background we hope you will have

- 3+ years of professional experience in compilers or high-performance systems software
- Proficiency in modern C++ (C++14/17/20) and Python
- Familiarity with compiler IRs (e.g., MLIR, LLVM, or equivalent) and their use representing complex program structures
- Solid foundation in program analysis and optimization techniques (e.g., SSA form, loop optimizations, vectorization)

The following would be nice to have, but is not required

- Hands-on experience developing MLIR or LLVM dialects for control flow (e.g. scf, cf) or affine/polyhedral representations.
- Background in compiler-hardware co-design: working with hardware designers to refine ISA or execution models for efficiency
- Proven ability to prototype irregular or control-flow algorithms in compiler IRs and optimize them for performance and resource constraints
- Experience extending ML compiler stacks (ONNX, IREE, XLA, PyTorch, TVM) to support workloads beyond DNNs

## What we offer

- The opportunity to make algorithmic and control-flow-heavy workloads practical on novel accelerator hardware.
- A role that bridges compiler design and hardware co-design, shaping both the IR and the accelerator architecture.
- A collaborative, innovative team that values engineering rigor, continuous integration, and user-focused design.
- Competitive compensation, equity, and benefits package.

## About Mythic

## Company Overview
- **One-liner**: Mythic is a semiconductor company developing analog compute-in-memory (CIM) processing units that deliver up to 100x greater energy efficiency for AI inference at the edge, in automotive, and in the data center.
- **Entity Type**: Private (Series C; total funding $290.4M as of 2021)
- **Headquarters**: Austin, Texas, United States (with offices in Silicon Valley, Vancouver, and Bangalore)
- **Founded**: 2012
- **Founders**: Mike Henry, Dave Fick, and Laura Fick (co‑founder and Chief Analog Compute Architect)

## Core Business
- **Primary industry**: Semiconductor manufacturing – AI hardware accelerators
- **Target customers**: B2B – OEMs and system integrators in automotive, defense, robotics, industrial IoT, and enterprise data centers
- **Mission statement**: “Enable a new era of AI performance and innovation by making it easier and more affordable to deploy powerful AI solutions, from the data center to the edge device.”

## Products & Services
- **Mythic APU (Analog Processing Unit)**: A chip built on analog compute-in-memory architecture that stores AI model weights inside flash memory and performs computation directly at the source, eliminating the energy wasted by moving data between processor and memory. Delivers up to 100x system‑level performance‑per‑watt‑per‑dollar vs. conventional digital/GPU inference. Available today for edge and enterprise deployments.
- **Mythic Software Platform**: A unified hardware/software stack that simplifies deploying AI models on the APU, including compilers, runtimes, and model optimization tools.

## Market Standing
- **Valuation / Market Cap**: Not disclosed (private company)
- **Key Metric**: $14.1M annual revenue (2026 estimate); $290.4M total funding raised across 8 rounds, including a $70M Series C in 2021 led by Hewlett Packard Enterprise and BlackRock, with earlier rounds led by SBVA (SoftBank) and Valor Equity Partners.
- **Notable Investors / Partners**: BlackRock, Hewlett Packard Enterprise, Valor Equity Partners, SBVA (SoftBank). The team includes veterans from NVIDIA, ON Semiconductor, and Luminar.
- **Growth Signals**: 
  - Headcount grew 46.4% YoY (to ~42 employees as of 2026).
  - Acquired Videantis (Jan 2026), a German AI processor company whose silicon is already running in 30 million production vehicles, giving Mythic an instant automotive ADAS footprint.
  - Active job postings for 18 open roles across hardware, software, and corporate functions.
  - Expanding into India with a VP of Mythic India and a Bangalore office.

## Competitive Advantages
- **Analog Compute-in-Memory**: Eliminates the Von Neumann bottleneck by computing in analog directly where data is stored, achieving up to 100x better energy efficiency than traditional digital or GPU inference.
- **Automotive‑Grade from Day One**: The Videantis acquisition provides proven, scalable ADAS/AD platforms already deployed in millions of vehicles, with customers like Bosch, Continental, and Valeo.
- **Proven Silicon**: Mythic’s APU is operational and available today, not theoretical.
- **Deep Talent Pool**: Team includes experts from NVIDIA, ON Semiconductor, Cisco, and leading chip companies, with a strong mix of analog, digital, and AI expertise.

## Strategic Focus
- **Scale the Automotive Business**: Leverage the Videantis acquisition to become a major player in automotive ADAS and autonomous driving compute.
- **Expand into Defense and Industrial**: Target high‑reliability, low‑power AI applications in defense, robotics, and industrial IoT.
- **Data Center Edge**: Deliver efficient inference for enterprise AI workloads that cannot afford the power cost of traditional GPUs.
- **Grow Global Team**: Build out software, hardware, and field engineering teams, particularly in India and the U.S.

## Why Work Here
- **Impactful Mission**: Work at the frontier of AI hardware, solving the fundamental energy efficiency problem in AI compute.
- **Collaborative, Results‑Focused Culture**: Mythic describes itself as a “collaborative, results‑focused team where everyone has a chance to contribute and lead.”
- **Rapid Growth**: 46% YoY headcount growth and a recently acquired company signal strong momentum and career growth opportunities.
- **Diverse Technical Challenges**: Roles span chip design, compiler engineering, AI algorithms, firmware, and systems engineering.
- **Hybrid/Office Policy**: Some roles are listed as hybrid (e.g., Palo Alto, Austin) or fully on‑site; exact policy varies by position. The company has offices in Austin, Silicon Valley, and Vancouver, with a growing presence in Bangalore.
- **Notable Perks**: Not explicitly stated, but working at a well‑funded, pre‑IPO startup in the AI hardware space typically offers equity, competitive compensation, and the chance to shape the future of computing.

## Sources
1. [Mythic Official Website](https://www.mythic.ai/)
2. [Mythic Careers Page (Lever)](https://jobs.lever.co/mythic-ai.com)
3. [Mythic Team Page](https://www.mythic.ai/company)
4. [Mythic LinkedIn Company Profile](https://www.linkedin.com/company/mythic-ai)
5. [Mythic Join Us Page](https://mythic.ai/join-us/)

## Other roles at Mythic

- [Principal Camera & Sensor Applications Engineer](https://feeny.ai/job/principal-camera-sensor-applications-engineer-mythic-palo-alto-a9nhp5ykhgfs) — Palo Alto, CA
- [EDA / CAD Engineer](https://feeny.ai/job/eda-cad-engineer-mythic-austin-qh2yvm2prd5z) — Austin, TX
- [Director, IT & DevOps](https://feeny.ai/job/director-it-devops-mythic-palo-alto-0fseadctweac) — Palo Alto, CA
- [System Administrator](https://feeny.ai/job/system-administrator-mythic-hannover-59km42a7bh8t) — Hannover, Germany
- [Senior NVM Digital Designer](https://feeny.ai/job/senior-nvm-digital-designer-mythic-palo-alto-a7mj1swqer36) — Palo Alto, CA
- [Senior Mixed Signal / Memory Circuit Designer](https://feeny.ai/job/senior-mixed-signal-memory-circuit-designer-mythic-palo-alto-4ed9jh7cdyzy) — Palo Alto, CA
- [Senior NVM Designer](https://feeny.ai/job/senior-nvm-designer-mythic-palo-alto-s3bjnvzh9evy) — Palo Alto, CA
- [Executive Assistant & Office Manager (Bangalore)](https://feeny.ai/job/executive-assistant-office-manager-bangalore-mythic-bengaluru-0nhckgpaxfjh) — Bengaluru, India
- [VP, Marketing](https://feeny.ai/job/vp-marketing-mythic-palo-alto-v62apd0f3aw9) — Palo Alto, CA
- [VP, Systems Engineering](https://feeny.ai/job/vp-systems-engineering-mythic-palo-alto-q74kcbvb8adp) — Palo Alto, CA