--- title: 'Digital Design Lead at Phizenix' canonical: 'https://feeny.ai/job/digital-design-lead-phizenix-santa-clara-gb92mzn0r7vw' type: 'job' last_seen: '2026-09-10' --- # Digital Design Lead at Phizenix - **Company:** Phizenix - **Location:** Santa Clara, CA - **Compensation:** $180k–$200k - **Posted:** 2026-07-20 - **Last confirmed live:** 2026-09-10 - **Apply:** https://job-boards.greenhouse.io/phizenix/jobs/5364968008 ## Job description ## Role Summary We are seeking experienced Digital Design Leads to drive RTL design and verification for next-generation semiconductor products. This role leads the digital design effort across high-speed interface and memory subsystem IPs, partnering with architecture, verification, and physical design teams to deliver silicon-ready designs. ## Key Responsibilities - Lead RTL design and micro-architecture definition for digital IP blocks from concept through tape-out. - Own design of Ethernet and/or PCIe controller/PHY digital logic, ensuring compliance with relevant industry specifications. - Design and integrate memory sub-system IP, including DDR, HBM, and/or LPDDR controllers and PHYs. - Implement and optimize Forward Error Correction (FEC) logic for high-speed serial links. - Drive design reviews, timing closure, and low-power design practices in collaboration with cross-functional teams. - Mentor junior design engineers and coordinate with verification, DFT, and physical design teams to meet project schedules. Required Skills & Experience - Proven track record as an RTL Design Lead on complex digital ASIC/SoC projects. - Hands-on experience with Ethernet and/or PCIe protocol design (controller and/or PHY level). - Experience with Memory Sub-systems: DDR, HBM, and/or LPDDR controller/PHY design and integration. - Working knowledge of Forward Error Correction (FEC) schemes as applied to high-speed SerDes links. - Strong RTL coding skills (Verilog/SystemVerilog) and familiarity with standard ASIC design flows. - Experience with timing closure, low-power design, and design-for-test (DFT) considerations. - Strong communication skills and experience leading or mentoring design teams. ## Qualifications - Bachelor's or Master's degree (BS/MS) in Electrical Engineering, Computer Engineering, or a related field. - Relevant years of hands-on RTL design experience in the semiconductor industry (leadership experience preferred). California Pay Range $180,000—$200,000 USD ## About Phizenix ## Company Overview - **One-liner**: Phizenix provides workforce solutions for the AI era, including top tech talent placement, AI strategy & development, and AI workforce training. - **Entity Type**: Private (Pre-Seed / Bootstrapped – no public funding rounds disclosed) - **Headquarters**: Livermore, California, United States - **Founded**: 2025 - **Founders**: Khursheed Irani ## Core Business - **Primary industry**: IT Services and IT Consulting, AI Consulting, Workforce Staffing - **Target customers**: B2B – businesses seeking AI transformation, technical talent, and AI upskilling (mid-market to enterprise) - **Mission or purpose statement**: “We’re a team of tech founders, operators, and builders on a mission to help businesses thrive in an AI-native world. We believe AI should empower people, not replace them.” ## Products & Services - **[Talent Staffing]**: Executive recruiting, permanent hire, contract staffing and management for technical roles (e.g., AI/ML engineers, DevOps, firmware engineers). - **[AI Strategy & Development]**: Consulting to discover automation opportunities, design AI solutions, and build production AI systems. - **[AI Workforce Training]**: Live workshops and online certification programs to increase teams’ AI skills. ## Market Standing - **Valuation/Market Cap**: Not publicly available (private company, no funding rounds disclosed) - **Key Metric**: Not disclosed (revenue not public). Employees: 12 as of early 2026. - **Notable Investors/Partners**: No named investors; leadership includes Khursheed Irani (CEO), Raashid Mehasanewala (Head of Solutions), Jumana Ghadiali (VP Operations), Sanjay Dayal (Senior Technology Advisor), Aziz Ghadiali (Head of AI and Marketing). - **Growth Signals**: Headcount growth of +7.7% monthly (LinkedIn estimate); active job postings on Greenhouse (3 open roles as of 2026); LinkedIn follower count 3,587 with +3.9% monthly growth. ## Competitive Advantages - **AI-native focus**: Entire business model centered on AI transformation, not a general staffing firm. - **Silicon Valley presence**: HQ in Livermore, CA, with additional presence in India and Canada, allowing access to diverse talent pools. - **Experienced leadership team**: Founders and VPs bring 20+ years of combined experience in tech, operations, and AI. ## Strategic Focus - **Current priorities**: Expand AI consulting engagements, scale talent staffing pipeline, and grow the training certification arm. Emphasis on “AI-native future of work” – helping companies integrate AI alongside human teams rather than replacing them. ## Why Work Here - **Culture**: Small, mission-driven team focused on AI empowerment. Emphasis on “AI should empower people, not replace them.” - **Remote/Hybrid/Office**: Many roles are remote; some are hybrid in San Francisco/Bay Area (e.g., Director of Engineering – Shopify & ERP). Offices in Livermore, CA and Bengaluru, India. - **Notable perks/engineering culture**: Opportunity to work at the intersection of AI and business transformation; hands-on involvement in building AI solutions for clients; growth potential in a young, rapidly expanding company. ## Sources 1. [phizenix.com](https://www.phizenix.com/) 2. [phizenix.com/careers](https://www.phizenix.com/careers) 3. [phizenix.com/about](https://www.phizenix.com/about) 4. [LinkedIn/Phizenix](https://www.linkedin.com/company/phizenix) 5. [Greenhouse/Phizenix](https://job-boards.greenhouse.io/phizenix/jobs/5197144008) ## Other roles at Phizenix - [Sr. Staff Backend Engineer](https://feeny.ai/job/sr-staff-backend-engineer-phizenix-hyderabad-psrdjq79ha1t) — Hyderabad, India - [LLM / Agentic Evaluation Rig Engineer](https://feeny.ai/job/llm-agentic-evaluation-rig-engineer-phizenix-hyderabad-x3nrtpps5f6d) — Hyderabad, India - [QA Automation Engineer](https://feeny.ai/job/qa-automation-engineer-phizenix-hyderabad-emn3ryp3sk2z) — Hyderabad, India - [Product Manager- Workflows](https://feeny.ai/job/product-manager-workflows-phizenix-remote-kp0tpcrhcbpd) - [Senior Analog & Mixed-Signal IC Designer](https://feeny.ai/job/senior-analog-mixed-signal-ic-designer-phizenix-santa-clara-22hs598ryxs0) — Santa Clara, CA / Irvine, CA - [ASIC Physical Design Engineer](https://feeny.ai/job/asic-physical-design-engineer-phizenix-bengaluru-sd4fja8bp25t) — Bengaluru, India - [Senior Analog/RF Layout Engineer](https://feeny.ai/job/senior-analog-rf-layout-engineer-phizenix-bengaluru-gen055rfqf07) — Bengaluru, India - [Senior Analog & Mixed-Signal IC Designer](https://feeny.ai/job/senior-analog-mixed-signal-ic-designer-phizenix-bengaluru-gzxnw70c7jwj) — Bengaluru, India - [Analog & Mixed-Signal IC Design Lead Engineer](https://feeny.ai/job/analog-mixed-signal-ic-design-lead-engineer-phizenix-bengaluru-hpvp5jt5b4qa) — Bengaluru, India - [Future Opportunities at Phizenix – Let's Stay Connected!](https://feeny.ai/job/future-opportunities-at-phizenix-let-s-stay-connected-phizenix-remote-ymyeg9621244)