---
title: 'Digital Verification Engineer at Efficient Computer'
canonical: 'https://feeny.ai/job/digital-verification-engineer-efficient-computer-san-francisco-bay-area-or-b80mnb8kdzs1'
type: 'job'
last_seen: '2026-11-05'
---

# Digital Verification Engineer at Efficient Computer

- **Company:** Efficient Computer
- **Location:** San Francisco Bay Area OR Pittsburgh PA OR Austin, TX
- **Posted:** 2026-10-22
- **Last confirmed live:** 2026-11-05
- **Apply:** https://job-boards.greenhouse.io/efficientcomputer/jobs/4463512009

## Job description

Efficient Computer is rethinking computing from the ground up to solve one of AI's biggest challenges: energy. Our Fabric architecture delivers a 10–100x improvement in energy efficiency for general-purpose computation, including AI, while supporting familiar programming languages and software frameworks—unlocking new possibilities for autonomous machines, intelligent infrastructure, wearables, and space systems. With our first processor, Electron E1, now shipping in volume and more than $97 million in Series B financing recently announced, we're accelerating customer deployments and scaling our architecture to data center performance. Join us to build the hardware and software that bring intelligence wherever it's needed and help shape the next generation of computing.

We are looking for a Design Verification Engineer to join our newly formed verification team and own the functional verification of blocks and subsystems in our SoC, including Efficient's proprietary Fabric technology. You'll work alongside senior DV engineers, RTL designers, and architects to build testbenches, close coverage, and find bugs before silicon does. This is a great opportunity to grow your skills while having a real influence on our products and processes as we move from initial product development to market release and scaled volume production.

## What You'll Do

- Develop and maintain UVM/SystemVerilog testbenches, sequences, and tests for block- and subsystem-level verification.
- Write verification plans from design specifications in collaboration with design and architecture teams.
- Write SystemVerilog assertions and functional coverage models, and drive coverage to closure.
- Debug simulation failures, working with designers to root-cause and fix issues.
- Contribute to regression infrastructure, automation, and dashboards that track verification progress.
- Support gate-level simulation and other sign-off activities.

Required Qualifications & Experience

- Education: Bachelor's or Master's/PhD degree in Electrical Engineering, Computer Engineering, or a related field.
- Experience: 4+ years of experience in ASIC/SoC design verification, with multiple projects taken through tapeout.
- UVM and SystemVerilog: Hands-on experience building and extending UVM testbench components (agents, scoreboards, sequences) and constrained-random tests.
- Coverage: Experience defining functional coverage and driving code and functional coverage closure at block or subsystem level.
- Assertions: Working knowledge of SystemVerilog Assertions.
- Debug Skills: Ability to independently debug simulation failures using waveforms, logs, and design knowledge.
- Scripting & Automation: Proficiency in Python for test automation, log analysis, and regression flows.
- Communication: Ability to clearly report verification status and issues to the team.

Ways to Stand Out

- C/C++ experience for reference models or DPI-based verification.
- Exposure to formal verification (JasperGold or similar).
- Experience building or using AI agentic flows for DV.
- Knowledge of computer architecture or dataflow architectures.
- Exposure to power-aware verification (UPF)

We offer a competitive base salary for this role, generally ranging from $130,000 to $180,000, plus a 10% annual bonus, meaningful equity, and comprehensive benefits. Final compensation will depend on experience, level, and location, with flexibility for the right candidate. Why Join Efficient?

Build what's next. At Efficient, you'll tackle big challenges with room to take ownership and make an impact. We back you with competitive pay, equity, a 401(k) match, company-paid benefits, paid parental leave, and flexibility—plus opportunities to grow your skills and career as we scale.

## About Efficient Computer

## Company Overview
- **One-liner**: Efficient Computer is building the world’s most energy-efficient general-purpose processor by combining a novel Fabric architecture with an intuitive compiler, targeting edge AI, industrial automation, space/defense, and beyond.
- **Entity Type**: Private (Series A)
- **Headquarters**: Pittsburgh, Pennsylvania, United States
- **Founded**: 2022
- **Founders**: Brandon Lucia (CEO) and Nathan Beckmann (Chief Architect)

## Core Business
- Primary industry/industries: Semiconductor / Computer Hardware / AI Chips
- Target customers: B2B – OEMs and systems integrators in edge AI, industrial automation, satellite/space, automotive, defense, and consumer electronics
- Mission or purpose statement: To set a new standard for energy efficiency in general-purpose computation, enabling applications that are infeasible today due to energy constraints. [efficient.computer/about](https://www.efficient.computer/about)

## Products & Services
- **[Electron E1 Processor]**: A general-purpose processor featuring the proprietary Fabric architecture and 4MB of on-chip MRAM. It replaces von Neumann execution with a spatial dataflow model, delivering up to 1 TOPS/W and scaling from 5.4 GOPS to 21.6 GOPS. Designed for always-on AI inference at the edge. [efficient.computer/technology](https://www.efficient.computer/technology)
- **[effcc Compiler]**: A drop-in replacement for GCC/Clang that automatically extracts parallelism from C, C++, and TFLite code and maps it to the Fabric architecture. Provides ultra-fast compilation times and a GDB-compatible debugging experience. [efficient.computer/technology](https://www.efficient.computer/technology)
- **[Fabric Architecture]**: The core technology – a tiled grid of reconfigurable compute nodes that eliminates instruction fetch and decode overhead, achieving 10–100× energy efficiency gains over traditional CPUs and GPUs. [efficient.computer](https://www.efficient.computer/)

## Market Standing
- **Valuation/Market Cap**: Not disclosed (private company)
- **Key Metric**: Total Funding – $70.0M across 3 rounds (Seed and Series A)
- **Notable Investors/Partners**: Triatomic Capital (led Series A), Eclipse (led Seed round). Key advisors include Alex Hawkinson (founder of SmartThings and BrightAI). [linkedin.com/company/efficientcomputer](https://www.linkedin.com/company/efficientcomputer)
- **Growth Signals**: 
  - 46 employees (+79.4% YoY, +27 people)
  - 13,966 LinkedIn followers (+180.4% yearly growth)
  - First silicon product (Electron E1) delivered to customers in mid-2025, ramping to volume distribution in 2026
  - Customer traction in physical AI, space/defense, automotive, and consumer products

## Competitive Advantages
- **Fabric Architecture**: A fundamentally new compute paradigm that is 10–100× more energy-efficient than traditional CPUs/GPUs for general-purpose workloads, including AI inference.
- **Full Programmability**: Unlike specialized accelerators that only optimize isolated kernels, the Fabric architecture accelerates entire applications without requiring code rewrites.
- **Proven Silicon**: Two silicon implementations (Electron E0 prototype and Electron E1 product) are already in customer hands.
- **World-Class Team**: Founders and key engineers are leading computer architects from Carnegie Mellon University, with deep expertise in efficient computing.

## Strategic Focus
- Scale the Electron E1 processor into high-volume production and distribution (targeting 2026).
- Expand into multiple verticals: physical AI, industrial automation, space/satellite, defense, automotive, and consumer electronics.
- Continue developing the effcc compiler ecosystem to support more frameworks and languages.
- Grow the engineering team, particularly in physical design, verification, architecture, and software optimization.

## Why Work Here
- **Cutting-Edge Technology**: Work on a novel processor architecture that redefines energy efficiency for the AI era.
- **Strong Growth Trajectory**: The company is scaling rapidly (nearly 80% headcount growth YoY) with a clear product-market fit and customer traction.
- **Engineering-Centric Culture**: 43% of the workforce is in technical roles, with a focus on computer architecture, compiler design, and silicon engineering.
- **Compensation & Benefits**: Competitive base salaries, meaningful startup equity, 401k matching, and a choose-your-own-adventure equipment allowance. [efficient.computer/about](https://www.efficient.computer/about)
- **Work Locations**: Offices in Pittsburgh, PA; San Jose, CA; and Austin, TX. Roles are on-site/hybrid at these hubs.
- **Values-Driven**: The company emphasizes integrity, impact, and accountability. [efficient.computer/about](https://www.efficient.computer/about)
- **Open Roles (as of mid-2026)**: 7 active positions including Design Verification Manager, Hardware Infrastructure & CI/CD Engineer, Senior Product Managers (Hardware/Software), Computer Architect, and Lead Physical Design Engineer.

## Sources
1. [efficient.computer](https://www.efficient.computer/)
2. [efficient.computer/about](https://www.efficient.computer/about)
3. [efficient.computer/technology](https://www.efficient.computer/technology)
4. [linkedin.com/company/efficientcomputer](https://www.linkedin.com/company/efficientcomputer)
5. [job-boards.greenhouse.io/efficientcomputer](http://job-boards.greenhouse.io/efficientcomputer)

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