--- title: 'Director, Silicon Logical Design at Graphcore' canonical: 'https://feeny.ai/job/director-silicon-logical-design-graphcore-bristol-wa3vdv96jrfe' type: 'job' last_seen: '2026-09-08' --- # Director, Silicon Logical Design at Graphcore - **Company:** Graphcore - **Location:** Bristol, United Kingdom / Cambridge, MA - **Posted:** 2026-04-02 - **Last confirmed live:** 2026-09-08 - **Apply:** https://job-boards.greenhouse.io/graphcore/jobs/8491411002 ## Job description ## About Graphcore At Graphcore, we’re building the future of AI compute. We’re a team of semiconductor, software and AI experts, with deep experience in creating the complete AI compute stack - from silicon and software to infrastructure at datacenter scale. As part of the SoftBank Group, backed by significant long-term investment, we are delivering key technology into the fast-growing SoftBank AI ecosystem. To meet the vast and exciting AI opportunity, Graphcore is expanding its teams around the world. We are bringing together the brightest minds to solve the toughest problems, in a place where everyone has the opportunity to make an impact on the company, our products and the future of artificial intelligence. Job Summary We are seeking a Director of Silicon Logical Design to lead and scale our Logical Design group within the Silicon department. This role is accountable for the overall strategy, technical direction, execution quality and team development for Graphcores microarchitecture and RTL design efforts. The Director will be responsible for ensuring that our logical design methodologies, architectures and RTL implementations meet world class standards for performance, power, area, and schedule. This leader will partner closely with Architecture, Physical Design, Verification, DFT and Program Management teams to ensure successful, predictable silicon delivery aligned with Graphcores long term product roadmap. The Team The Logical Design team deliver the micro-architecture and RTL that realise our advanced chip architectures. As Director, you will guide this multi site team, strengthen cross functional collaboration, and drive the evolution of our design flows and capabilities. ## Responsibilities and Duties Leadership & Strategy - Define and execute the strategic roadmap for Logical Design, ensuring alignment with Graphcores silicon and product strategy. - Lead, grow and mentor a high performing RTL/micro architecture design organisation. - Establish and implement best in class design methodologies, documentation standards and quality metrics. - Drive continuous improvement across team structure, workflows, tooling, and design processes. Technical Ownership - Provide technical oversight of micro architecture specification and RTL development across all major blocks and subsystems. - Guide architectural feasibility studies, contribute to architectural trade offs and micro architecture definition. - Oversee the integration of third party IP, complex application specific blocks, and high performance custom designs. - Ensure robust design sign off through high quality linting, synthesis, CDC/RDC, timing closure and coverage metrics. Cross-Functional Collaboration - Partner closely with Physical Design, Verification, DFT, Architecture and Program Management teams to ensure cohesive planning and execution. - Foster strong communication across teams and global sites, ensuring alignment on priorities, risks and deliverables. - Support silicon bring-up and debug efforts by providing expert guidance and deep understanding of RTL behaviour and architecture. Execution & Delivery - Own delivery of high quality, on schedule RTL for multiple parallel silicon programs. - Establish scalable project planning and tracking practices, including resource planning and risk mitigation. - Champion design automation and infrastructure improvements to accelerate productivity and improve design quality. Essential Skills & Experience - Degree in Computer Science, Electrical Engineering or a related field; advanced degree preferred. - Extensive experience in digital logical design, micro-architecture and RTL development for large scale, high performance silicon projects. - Proven success leading and developing technical teams in a semiconductor environment. - Deep expertise in SystemVerilog or VHDL and familiarity with modern digital design flows. - Strong ability to diagnose and resolve complex design issues, including via scripting/programming (Python, Tcl, etc.). - Demonstrated excellence in cross functional leadership and communication across global teams. - Strong organisational skills with ability to manage multiple priorities and drive execution in fast-paced environments. Desirable Experience - Processor or accelerator micro architecture. - High-speed serial interfaces and complex, high bandwidth IP blocks. - Arithmetic pipeline design and floating point datapaths. - Advanced synthesis, timing analysis, power analysis, and logical equivalence checking. - Design-for-test methodologies. - Power integrity and silicon device level understanding. - Experience with silicon bring-up and post-silicon validation. - Program planning and multi-project execution leadership. ## About Graphcore ## Company Overview - **One-liner**: Graphcore designs and builds the Intelligence Processing Unit (IPU), a processor purpose-built for machine intelligence, and provides a complete AI compute stack from silicon to software. - **Entity Type**: Private (wholly owned subsidiary of SoftBank Group Corp as of 2025/2026) - **Headquarters**: Bristol, England, UK - **Founded**: 2016 - **Founders**: Nigel Toon and Simon Knowles ## Core Business - **Primary industry**: AI hardware/accelerators, semiconductor design, AI software platform - **Target customers**: Cloud providers (Microsoft Azure), enterprises, AI researchers, hyperscalers - **Mission statement**: “Let innovators create the next breakthroughs in machine intelligence to enhance human potential” ## Products & Services - **[IPU (Intelligence Processing Unit)](https://www.graphcore.ai/)**: A processor designed from the ground up for machine intelligence workloads; uses a massively parallel architecture (MIMD) with fine-grained compute and on-chip memory. - **[IPU-Machine M2000](https://www.graphcore.ai/about)**: Second-generation IPU platform – a 1U server appliance housing 4 MK2 GC200 IPU processors, delivering an 8× performance uplift over the first generation. - **[C2 IPU Accelerator PCIe Card](https://www.graphcore.ai/about)**: PCIe form factor accelerator for server integration, first demonstrated at ICML 2018. - **[Poplar Software Stack](https://www.graphcore.ai/)**: Full SDK and framework integration (PyTorch, TensorFlow) that lets developers target the IPU directly. ## Market Standing - **Valuation/Market Cap**: Acquired by SoftBank Group Corp (amount undisclosed); prior to acquisition valued at $2.77 B (Series E, lead by Ontario Teachers’ Pension Plan Board). - **Key Metric**: Total funding raised prior to acquisition – over $680 M across Series A through E. - **Notable Investors/Partners**: SoftBank (owner), Microsoft (customer and investor), BMW, Samsung, Dell Technologies, Bosch, Sequoia Capital, Atomico, Fidelity, Baillie Gifford, Ontario Teachers’. - **Growth Signals**: Part of the fast-growing SoftBank AI ecosystem; expanding teams globally (Bristol, London, Cambridge, Gdańsk, Hsinchu, Bengaluru); first customer (Microsoft Azure) live since 2018. ## Competitive Advantages - **First purpose-built AI processor**: The IPU architecture is fundamentally different from GPUs – designed specifically for the sparse, parallel nature of neural network computation. - **Full stack ownership**: Graphcore controls silicon, system hardware, and software (Poplar), enabling tight optimisation across the entire compute chain. - **Cloud + on‑prem availability**: IPUs are available in the cloud on Microsoft Azure and as hardware from Dell, giving customers flexible deployment options. - **Strong IP and ecosystem**: 99+ engineering staff; deep expertise in semiconductor, systems, and AI software, backed by long-term SoftBank investment. ## Strategic Focus - **Scale AI infrastructure**: Delivering key technology into SoftBank’s global AI ecosystem and expanding the IPU platform to meet growing demand for AI compute. - **Expand into new regions**: Opening offices and hiring in India (Bengaluru) and across Europe (Gdańsk, London, Cambridge) to accelerate R&D and customer support. - **Democratise AI**: Continuing to lower the barrier for machine intelligence by providing accessible, high-efficiency hardware and software for innovators worldwide. ## Why Work Here - **Flexible hybrid work**: Employees are expected on-site three days a week, with trust and flexibility to balance work and life. - **Comprehensive benefits**: Unlimited annual leave, private medical insurance (UK), dental & health cash plan, income protection, life assurance, pension matched up to 5%, generous parental leave, and a personal development plan. - **Culture and growth**: ML reading groups, board game socials, book clubs, yoga, running, watersports, team events; strong DE+I initiatives; ambitious but supportive environment. - **Perks**: Free barista‑made coffee, snacks, and wellbeing rooms; cycle‑to‑work scheme; gym membership discount; education/training allowances. - **Purpose-driven work**: Opportunity to shape the future of AI compute and see your contributions used by global innovators. ## Sources 1. [graphcore.ai/about](https://www.graphcore.ai/about) 2. [graphcore.ai/](https://www.graphcore.ai/) 3. [graphcore.ai/careers](https://www.graphcore.ai/careers) 4. [graphcore.ai/jobs](https://www.graphcore.ai/jobs) 5. [builtin.com/company/graphcore](https://builtin.com/company/graphcore) ## Other roles at Graphcore - [Technical Programme Manager](https://feeny.ai/job/technical-programme-manager-graphcore-bristol-tnv81pjcg71q) — Bristol, United Kingdom - [Technology Owner](https://feeny.ai/job/technology-owner-graphcore-bristol-d8detpv2a2gt) — Bristol, United Kingdom - [Staff Silicon Physical Design Engineer - Bengaluru](https://feeny.ai/job/staff-silicon-physical-design-engineer-bengaluru-graphcore-bengaluru-5zwkhyr3ps27) — Bengaluru, India - [Staff Robotics Engineer](https://feeny.ai/job/staff-robotics-engineer-graphcore-austin-texas-48zjd6k5bqkd) — Austin Texas, United States - [Staff Engineering Program Support](https://feeny.ai/job/staff-engineering-program-support-graphcore-milpitas-california-hrx7htcx8rkq) — Milpitas California, United States - [Senior Engineering Program Coordinator](https://feeny.ai/job/senior-engineering-program-coordinator-graphcore-milpitas-california-k5rv0zfbxp3p) — Milpitas California, United States - [Staff Engineering Operations Technical Program Manager](https://feeny.ai/job/staff-engineering-operations-technical-program-manager-graphcore-austin-texas-ffy430feqmnr) — Austin Texas, United States - [Principal Network Program Manager, AI Infrastructure](https://feeny.ai/job/principal-network-program-manager-ai-infrastructure-graphcore-milpitas-ta509snr3rw9) — Milpitas California, United States - [Principal Engineering Program Manager](https://feeny.ai/job/principal-engineering-program-manager-graphcore-austin-texas-m5g623168tsj) — Austin Texas, United States - [Staff Hardware Engineer](https://feeny.ai/job/staff-hardware-engineer-graphcore-austin-texas-tf5ew0k0z9g8) — Austin Texas, United States