---
title: 'DV - Principal Digital Verification Engineer at Eliyan'
canonical: 'https://feeny.ai/job/dv-principal-digital-verification-engineer-eliyan-vancouver-bc-or-bay-area-jttvf7k0jdc6'
type: 'job'
last_seen: '2026-09-07'
---

# DV - Principal Digital Verification Engineer at Eliyan

- **Company:** Eliyan
- **Location:** Vancouver Bc OR Bay Area, CA
- **Employment:** full-time
- **Work type:** onsite
- **Posted:** 2026-04-27
- **Last confirmed live:** 2026-09-07
- **Apply:** https://jobs.lever.co/eliyan/5d02e30e-884f-4367-8805-1d7537bcdbdb

## Job description

Join the leading chiplet startup!  As an Eliyan Principal Digital Verification Engineer, you will be working at a fast-paced early-stage startup creating technologies that fuel tomorrow’s chiplet based systems with best-in-class power, area, manufacturability, and design flexibility.  You will be a key technical leader in developing state-of-the-art testbenches and unit/chip level test cases for best-in-class PHYs and Controllers. You will lead verification methodologies for Eliyan products.  You will work with a cross-functional team of experts that operate from first principles, innovate and push the envelope to create high-volume and high-performance manufacturable products.  We offer a fun work environment with excellent benefits.

Key Responsibilities:

- Provide technical verification leadership to Eliyan products and provide guidance to junior engineers.
- Develop and execute verification plans for connectivity IPs and Chiplets .
- Create and maintain SystemVerilog/UVM-based verification environments .
- Write and debug SystemVerilog/UVM compliant test cases for block and chip level.
- Maintain a regression environment for enabling design CI/CD pipelines.
- Collaborate with design engineers to ensure design quality with continuous micro-architecture, test-plan, and coverage reviews.
- Develop, maintain, and track various test plan items and progress towards RTL freeze.
- Stay up to date with industry trends, emerging technologies and progress in standards’ bodies.
- Ensure IP compliance with industry standard protocols.
- Integration of 3rd party VIPs and coordinate feature/bug tracking requests.
- Perform in the capacity of a technical leader for junior verification engineers.
- Create, improve, maintain DPI based FW simulation environments.
- Create, improve, maintain gate level simulation environments for functional and power simulations.
- Drive state of art verification methodologies for silicon verification including constrained based random verification, coverage driven verification.
- Create microcontroller sub system testbenches and verification plan.
- Own end-to-end verification for the company products.
- Automation of verification flows including automated regression flow

Qualifications:

- BS in Electrical Engineering and related fields with 15+ years of experience
- Strong expertise in UVM, test environment and assertion coding with SystemVerilog
- Strong expertise on coverage driven verification
- Proficiency in 3rd party tools for regression management and coverage analysis
- Experience working on connectivity interfaces and protocols.
- Knowledge of IO interface is a plus
- Strong bias for innovations across all aspects of digital verification including automation of mundane activities and methods for quality improvement
- Experience in verifying 3rd party mixed signal IPs as well as integration of VIPs
- Proven track record of being part of a start-up like environment
- Strong debugging skills
- Strong understanding of microcontroller architecture and related peripheral talking to microcontrollers
- Hands on experience with one of the scripting languages

## About Eliyan

## Company Overview
- **One-liner**: Eliyan develops high-bandwidth, low-power chiplet interconnect technology (NuLink) that solves data bottlenecks in AI and data center chips.
- **Entity Type**: Private (Series C-II)
- **Headquarters**: Santa Clara, California, United States
- **Founded**: 2021
- **Founders**: Ramin Farjadrad (CEO), Syrus Ziai (VP Engineering), Patrick Soheili (Chief Strategy & Business Officer)

## Core Business
- Primary industry: Semiconductor Manufacturing (chiplet interconnect IP and PHY silicon)
- Target customers: B2B – companies building custom AI chips (hyperscalers, chip designers, networking firms)
- Mission: “Revolutionize chiplet connectivity technologies by challenging the status quo to unleash the ultimate performance of smart systems of the future.”

## Products & Services
- **[NuLink™ D2D PHY](https://eliyan.com/about/)**: Die-to-die interconnect PHY supporting industry standards (BoW and UCIe) and proprietary simultaneous-bidirectional (SBD) technology. Delivers 4× the bandwidth and 2× the power efficiency of alternatives in advanced or standard packaging, with bump pitches from 40–130 microns.
- **[NuLink™-XD](https://linkedin.com/company/eliyan-corporation)**: A new class of power-reach configurable 224G PAM4 SerDes for chip-to-chip and chip-to-module applications, targeting the lowest-power electro-optical modules for AI scale-up networks. Up to 40% lower power than competing solutions.

## Market Standing
- **Valuation**: $1 billion (as of July 2026 Series C)
- **Annual Revenue**: $3.5 million (2025); forecasts hundreds of millions by end of 2027 [reuters.com](https://www.cbinsights.com/company/eliyan)
- **Total Funding**: $295 million (conflicting reports: other sources state $150M total); includes $145M Series C led by Seligman Ventures (July 2026), $60M Series B led by Samsung Catalyst Fund and Tiger Global (March 2024), $40M Series A led by Tracker Capital (Nov 2022).
- **Notable Investors/Partners**: Seligman Ventures (board seat for Umesh Padval), Cisco Systems, Lumentum, Samsung Catalyst Fund, Tiger Global Management, Tracker Capital, VentureTech Alliance.
- **Growth Signals**: Headcount of 73 employees with +6.7% monthly growth; 21 active job postings (quarterly trend +2,000%); expects to start chiplet shipments in 2026; expanding across 6 countries (US, Germany, Netherlands, Canada, India, Israel).

## Competitive Advantages
- Breakthrough die-to-die interconnect architecture (invented by founder Ramin Farjadrad in 2016) that achieves 4× bandwidth and 2× power efficiency versus competing IP.
- Works with standard packaging (wide range of bump pitches), reducing cost and complexity for chip designers.
- Independent alternative to Broadcom/Marvell in the chiplet interconnect space, giving custom AI chip makers a neutral, high-performance option.

## Strategic Focus
- Solving the growing data-movement bottleneck in AI compute (GPUs often idle 30–40% waiting for data).
- Scaling NuLink and NuLink-XD platforms to support both chip-to-chip and chip-to-module applications for next-generation AI infrastructure.
- Ramping chiplet production and licensing revenue, targeting hundreds of millions in sales by 2027.

## Why Work Here
- On-site culture with offices in Santa Clara (HQ), Vancouver (BC), and other global locations; no remote/hybrid mentioned.
- Engineering-heavy team (54% technical roles) with a fast-paced startup environment and deep expertise from companies like Marvell, Intel, AMD, and Synopsys.
- Opportunity to work on cutting-edge semiconductor interconnect technology that directly impacts AI performance.
- Active hiring across digital design, verification, DFT, physical design, optical engineering, and program management.

## Sources
1. [eliyan.com/about](https://eliyan.com/about/)
2. [jobs.lever.co/eliyan](https://jobs.lever.co/eliyan)
3. [linkedin.com/company/eliyan-corporation](https://linkedin.com/company/eliyan-corporation)
4. [cbinsights.com/company/eliyan](https://www.cbinsights.com/company/eliyan)
5. [reuters.com (via CNA)](https://www.cbinsights.com/company/eliyan) (Note: embedded Reuters article on CB Insights page)
6. [eliyan.com/careers](https://eliyan.com/careers/)

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