---
title: 'Hardware Engineer, Lead Architect at Normal Computing Corporation'
canonical: 'https://feeny.ai/job/hardware-engineer-lead-architect-normal-computing-corporation-silicon-valley-6fvq60qmptdw'
type: 'job'
last_seen: '2026-09-10'
---

# Hardware Engineer, Lead Architect at Normal Computing Corporation

- **Company:** Normal Computing Corporation
- **Location:** Silicon Valley
- **Employment:** full-time
- **Work type:** hybrid
- **Posted:** 2026-08-16
- **Last confirmed live:** 2026-09-10
- **Apply:** https://jobs.ashbyhq.com/normalcomputing/308ca921-30d3-43bc-8217-8570c62480b2

## Job description

Normal Computing | Build with Us Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.

## The Role

As a Hardware Lead Architect, you will define the silicon and system microarchitecture for our custom unconventional compute platform—driving the architectural trade-offs that unlock a 100–1000x leap in energy efficiency over traditional digital chips for LLM and diffusion model inference. You will lead the hardware/software co-design efforts to break the von Neumann memory wall. By translating transformer architectures (KV-cache management, attention mechanisms) and diffusion execution flows into custom mixed-signal compute tiles, memory hierarchies, and tile interconnects, you will set the blueprint for our hardware. Working closely with compiler, RTL, and analog teams, you will build performance models, establish microarchitectural specifications, and ensure our custom silicon delivers maximum throughput-per-watt on real-world generative AI workloads.

## What You Will Own

- Compute Architecture: Help define the architecture and microarchitecture of novel AI accelerator compute blocks: PE array design, datapath organization, and support for efficiency techniques such as sparsity exploitation and reduced-precision computation. The compute tile is the surface where Normal's research advantages have to show up in silicon, and you are one of the people responsible for making sure they do.
- Workload-to-Hardware Translation: Translate workload analysis and research findings into hardware specifications. Identify where architectural innovation creates the most leverage, define the structures that realize it, and produce microarchitecture documents unambiguous enough for RTL engineers to implement against. You work closely with them through implementation, not over the wall from it.
- Full-Stack PPA Tradeoffs: Reason across the full stack and defend PPA tradeoffs at every level. Move between algorithm-level workload behavior, memory hierarchy, on-chip interconnect, and physical design constraints. Make the call when the data is incomplete, and articulate why under scrutiny from our Systems Architect and the research team.
- ISA Co-Design: Partner with the compiler lead on ISA co-design. The programming model and the microarchitecture are defined together, and you are accountable for both sides meeting in the middle.
- Prototyping Strategy: Direct block-level pre-silicon validation. Decide which microarchitecture questions need to be answered, and the appropriate platform. Partner with our FPGA Design Engineers, who own implementation and bring-up, to de-risk decisions before tapeout. Work with the Systems Architect to make sure there are no gaps from block to System-level validation.
- Research Fluency: Stay current with the AI accelerator research landscape and be able to articulate clearly where Normal's approach differs from existing solutions and why that matters. This is a research-adjacent seat and you are expected to read, possibly publish, and not just consume.

What Makes You a Great Fit

- A degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent work experience. PhD welcome but not required; the bar is the work, not the credential.
- Substantial experience in architecture or microarchitecture of high-performance digital systems: AI accelerators, compute engines, or similarly complex logic. You have shaped and directed the structures inside a chip, not just consumed them from the outside.
- Fluency moving between algorithm-level analysis and hardware specification. You can read a profile of a workload and translate it into datapath widths, pipeline stages, and area/power estimates without losing the thread on either side.
- Experience with simulation-driven architecture. You have used cycle-accurate or analytical models to make and defend design decisions before RTL exists, and you know which questions each tool can answer and which it cannot.
- Familiarity with quantization and reduced-precision approaches for inference and their implementation implications. You understand the cost of a bit at the hardware level, not just the model level.
- Experience writing microarchitecture specifications and working closely with RTL engineers through implementation.
- Proficiency in Python or C++ for performance modeling and analysis, and familiarity with SystemVerilog or equivalent RTL.
- Comfort operating in an environment where the architecture is actively being discovered alongside the work. You do not need the answer to be already known to make progress on it.

## Equal Employment Opportunity Statement

Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status. Accessibility Accommodations Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com. Privacy Notice By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Privacy Policy.

## About Normal Computing Corporation

## Company Overview
- **One-liner**: Normal Computing builds AI-accelerated EDA software and physics-based ASICs to enable ultra-efficient hardware for the AI era.
- **Entity Type**: Private (Series B; total funding $92.5M)
- **Headquarters**: New York, New York, USA
- **Founded**: 2022
- **Founders**: Faris Sbahi (CEO), Matthias Tan (Co-Founder), and team of former Google Brain/Google X engineers and scientists

## Core Business
- Primary industry: Semiconductor design (EDA) and custom silicon (ASICs), powered by AI and probabilistic computing.
- Target customers: Large semiconductor design and manufacturing institutions (B2B, enterprise).
- Mission: "Rewriting AI foundations to advance the frontier of reasoning and reliability in the physical world" and enabling a virtuous cycle of self-improving AI hardware.

## Products & Services
- **[Normal EDA](https://normalcomputing.com/)**: An AI-driven electronic design automation platform that understands design intent from specification documents, generates hierarchical test plans with traceability, creates SystemVerilog stimulus, runs simulations, and tracks coverage. It continuously learns from team feedback to accelerate verification for complex chip designs.
- **[Normal ASICs](https://normalcomputing.com/)**: Physics-based custom ASICs that relax traditional computing assumptions (stochastic, stateful, asynchronous) to unlock orders-of-magnitude more efficient compute. Designed to converge hardware with the physical dynamics of AI models.

## Market Standing
- **Valuation/Market Cap**: Not publicly disclosed.
- **Key Metric**: **Total Funding** – $92.5M across multiple rounds (Seed, Venture, Grant, Series B). Notable recent round: $50M led by **Samsung Catalyst** in March 2026 [normalcomputing.com](https://normalcomputing.com/).
- **Notable Investors**: Samsung Catalyst Fund, Intel Ignite, First Spark Ventures, Celesta Capital, ARIA. Also partners with Fraunhofer IESE (DRAMBench benchmark).
- **Growth Signals**: Headcount grew **196.3% YoY** to 54 employees; operates across 6 countries (US, UK, Denmark, Switzerland, India, Canada); actively building open-source tools (e.g., a Verilog simulator built with AI: 580K lines in 43 days).

## Competitive Advantages
- **Physics-First Approach**: Unlike traditional digital logic, Normal’s ASICs embrace stochastic, stateful, and asynchronous computing – aligning hardware with the physics of AI models for dramatic efficiency gains.
- **Full-Stack Co-Design**: The combination of AI-native EDA tools and custom silicon creates a closed loop where software and hardware are co-optimized, shortening time-to-market and enabling workload-specific ASICs.
- **Deep AI Heritage**: Founders and team hail from Google Brain and Google X, bringing deep expertise in probabilistic ML, quantum AI, and physical-world reasoning.

## Strategic Focus
- **Scaling EDA Adoption**: Expanding Normal EDA’s use among top semiconductor companies to "make chip design look more like software".
- **AI Hardware Energy Crisis**: Tackling soaring power demands of AI by delivering ultra-efficient ASICs that can be produced for every workload.
- **Open-Source & Research**: Building community trust through open benchmarks (DRAMBench) and tools (CIRCT-based verification), while advancing formal methods and AI-driven simulation.

## Why Work Here
- **Hybrid Workspace**: Flexible in-office collaboration at offices in **New York (Flatiron HQ)**, **San Francisco**, **London**, and **Copenhagen**. In-person collaboration is valued but with flexibility; free lunch, snacks, and beverages in office.
- **Lean, High-Impact Team**: Small team (54 employees) where every member drives significant impact, works directly with customers, and owns meaningful parts of the product.
- **Interdisciplinary Challenges**: Work spans AI, probabilistic software, hardware, physics, and full-stack engineering – ideal for curious, passionate problem-solvers.
- **Strong Growth Trajectory**: Rapid headcount growth (+196% YoY), recent $50M Series B, and partnerships with industry giants signal a well-funded, high-potential startup.

## Sources
1. [normalcomputing.com](https://normalcomputing.com/)
2. [normalcomputing.com/about](https://normalcomputing.com/about)
3. [linkedin.com/company/normal-computing-corporation](https://www.linkedin.com/company/normal-computing-corporation)
4. [builtin.com/company/normal-computing](https://builtin.com/company/normal-computing)
5. [jobs.ashbyhq.com/normalcomputing](https://jobs.ashbyhq.com/normalcomputing)

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