---
title: 'Member of Technical Staff, Post-Training & Applied Research at San Francisco Tensor Company'
canonical: 'https://feeny.ai/job/member-of-technical-staff-post-training-applied-research-san-francisco-tensor-rj1qrpm2j557'
type: 'job'
last_seen: '2026-09-13'
---

# Member of Technical Staff, Post-Training & Applied Research at San Francisco Tensor Company

- **Company:** San Francisco Tensor Company
- **Location:** San Francisco, CA
- **Compensation:** $275k–$315k
- **Employment:** full-time
- **Work type:** onsite
- **Posted:** 2026-08-29
- **Last confirmed live:** 2026-09-13
- **Apply:** https://jobs.ashbyhq.com/sf-tensor/9232c990-4435-45f9-8002-721f52aab5be

## Job description

At SF Tensor, we're building the future of high-performance compute We firmly believe that the future of AI depends on the unglamorous: rethinking and rebuilding the stack, all the way down. From the hardware underneath it to the compiler targeting it and the cloud running it. Right now those three things fight each other and that friction shows up as a tax on every researcher trying to build something ambitious. We're here to axe that tax and make compute faster, cheaper and more available. When we succeed, compute will be portable enough that "which cloud, which chip" stop being something you worry about. To achieve this, we are building our Kernel Optimizer, which takes code and finds its fastest possible form for whatever vendor and cluster topology you point it at, automatically, as well as the Model Foundry which manages the runs, makes research easier and moves workloads across clouds and chips as prices and availability ship, instead of leaving you locked into whatever vendor you signed with first. We're backed by Susa Ventures, Y Combinator, along with some great funds and angels including Max Mullen and Paul Graham, as well as founders and executives at Neuralink, Notion and AMD. We're looking for researchers, engineers and organizations who agree with the basic premise: you don't get the next leap in AI without a leap in compute first.

## About the Role

We build the fastest GPU compiler in the world. Most compilers have to preserve correctness at every transform, constraining how far they can search, while we prove correctness at the end instead, allowing us to search a far wider space, with agents, with RL, with anything that works and still guarantee the result. It's why we hold #1 on NVIDIA's own kernel benchmark across hundreds of production kernels. Speed at the kernel layer is only worth what we do with it though and our enterprise offering promises we'll turn a customer's dataset into a specialist model in days. To do that we run SFT, RL, DPO, design evals and distillation down to smaller and edge-deployable models. We're hiring a Member of Technical Staff to own the modeling side of that end to end. The infrastructure you'll be working on top of is unusually strong, which is the only reason we're able to train models so fast. Every experiment goes through Model Foundry, which let's you run experiments on the best hardware, look at overviews or dive deep into any detail all in a versioned and reproducible manner, making it trivial to reuse and modify recipes. Underneath that is the most powerful engine you could ask for, which has been used to post-train multi-100B language parameter models on TPU, post-train robotics models on Trainium and pre-train AlphaFold v3 on AMD.

## What You'll Do

- You'll own the post-training pipeline end-to-end: data curation, SFT, preference optimization, RL, evals, distillation and finally deployment
- You'll design reward functions and RL looks along customer domain experts, who know the task inside-out but not our training stack
- You'll build an eval harness trustworthy enough to make a ship/no-ship call within a short window, especially where the target is subjective taste rather than a scored benchmark
- You'll structure and generate datasets, including synthetic data pipelines, from whatever the customer actually has
- You'll distill specialist models down into smaller models
- You'll drive the time-to-model, which means finding what's actually on the critical path and removing it, run after run
- You'll embed with customers as a forward-deployed researcher, then hand the pipeline over cleanly when their team is ready to take over

## What We're Looking For

- Someone who's shipped post-trained models into production and can talk honestly about the tradeoffs
- Someone with hands-on depth across SFT and RL (DPO, GRPO, PPO or similar)
- Someone who can judge evaluation honestly: what to measure, what a result means and when a number is lying to you
- Someone who's comfortable owning data: curation, filtering, labeling workflows and synthetic generation
- Someone proficient in PyTorch or JAX
- Someone willing to sit with customers' domain experts to turn their intuition into a reward function

## Nice to Have

- Someone who's worked on RL infrastructure at scale: rollout engines, distributed training or throughput debugging
- Someone with experience in distillation, quantization and speculative decoding
- Someone who's post-trained for agents and tool use
- Someone who's been forward-deployed or has customer-facing engineering experience

## Why Join Us

Most post-training people spend most of their time fighting infrastructure that they don't control and your ideas are never the bottleneck, the ability to execute them is. We invest heavily into integrating AI tooling into our infrastructure and model foundry to speed up the research process and get you from idea → result as fast as possible. Beyond that, the people who wrote the rollout engine, the inference engine and the kernels under both are the same people you eat lunch with, so if your run is slow, a fix is a conversation and not a ticket. We're a small team operating at frontier scale. We pre-trained foundation models on 4,000 AMD GPUs as a team of three, designed and brought up GB300 NVL72 clusters and designed a TOP500 supercomputer. We believe that hard problems get solved in person and most of our work happens at our office in San Francisco. We offer relocation assistance and, where possible, we'd like you here as often as possible. The base salary range for this full-time position is $275,000-$315,000, plus meaningful equity and benefits.

## About San Francisco Tensor Company

## Company Overview
- **One-liner**: San Francisco Tensor Company (SF Tensor) builds an integrated stack of a programming language (Emma), an automatic kernel optimizer, and a cross-cloud compute platform (Tensor Cloud) to make AI and HPC workloads faster, cheaper, and hardware-portable.
- **Entity Type**: Private (Startup, Y Combinator Fall 2025 batch)
- **Headquarters**: San Francisco, California, USA
- **Founded**: 2025
- **Founders**: Ben Koska (CEO), Tom Koska, Luk Koska

## Core Business
- **Primary industry/industries**: AI Infrastructure, High-Performance Computing (HPC), Compiler & Kernel Optimization, Cloud Compute
- **Target customers**: AI research labs, AI startups, and enterprises training or running large-scale machine learning models (B2B).
- **Mission or purpose statement**: To reinvent how the world computes by making computation faster, cheaper, and more portable across every platform, thereby breaking the hardware vendor lock-in (e.g., NVIDIA's CUDA moat) and allowing researchers to focus on advancing models rather than managing infrastructure.

## Products & Services
- **[Emma Language]**: A new programming language designed to abstract away the quirks of individual hardware platforms (GPUs, TPUs, etc.) while delivering performance equivalent to hand-tuned kernels. Allows code to be written once and run on any hardware without rewriting.
- **[Kernel Optimizer]**: An automatic optimization engine that transforms training kernels into their mathematically fastest forms by simulating memory, cache, and hardware topology. It often exceeds the performance of hand-tuned human code. Available as a service.
- **[Tensor Cloud]**: A managed, cross-cloud compute platform that automatically finds the cheapest hardware (GPUs) across all major providers. It orchestrates training jobs, handles spot instance preemption, and manages infrastructure complexity for teams running from 1 to 10,000 GPUs. Cuts compute costs by up to 80%.

## Market Standing
- **Valuation/Market Cap**: Not publicly available (early-stage startup).
- **Key Metric**: Total Funding – Backed by Y Combinator (Fall 2025 batch). Specific funding amount not disclosed. Revenue is not publicly available.
- **Notable Investors/Partners**: Y Combinator (Primary Partner: Harj Taggar).
- **Growth Signals**: The company was founded in 2025 and is already live with Tensor Cloud, a Kernel Optimizer, and the Emma language preview. It has a team of 6 people and is actively hiring for multiple founding-level engineering roles, indicating rapid early-stage scaling.

## Competitive Advantages
- **Integrated Full Stack**: By combining a purpose-built language (Emma), a hardware-aware kernel optimizer, and a cross-cloud orchestration platform, they offer a unified solution that competitors typically only address piecemeal.
- **Hardware Agnosticism**: Their core mission is to break the CUDA moat, making it easy for AI teams to run on AMD, Google, or Amazon hardware without performance loss, thereby reducing costs and dependency on NVIDIA.
- **Automatic Optimization**: Their kernel optimizer claims to beat hand-tuned implementations by using algorithmic reformulation based on micro-benchmarking of hardware topology, a deep technical moat.
- **Founding Team**: Founders with deep technical backgrounds (Ben Koska finished a BSc in CS at age 16) and a clear, ambitious vision.

## Strategic Focus
- **Product Development**: Continuing to build out the Emma language, the Kernel Optimizer, and Tensor Cloud into a seamless, production-ready platform.
- **Market Adoption**: Onboarding early design partners and AI labs to validate the stack and build a user base.
- **Hiring**: Aggressively hiring founding engineers (GPU Kernel, Compiler, Research, Product) to scale the team and accelerate development.
- **Breaking Vendor Lock-in**: A core strategic goal is to provide a viable alternative to NVIDIA's CUDA ecosystem, enabling customers to leverage cheaper, non-NVIDIA hardware.

## Why Work Here
- **Mission-Driven**: Opportunity to solve one of the hardest and most impactful problems in AI: the compute bottleneck and infrastructure complexity.
- **Technical Depth**: The work involves pushing hardware to its limits, designing new programming languages, and writing cutting-edge compilers and kernel code. The culture values deep technical engagement.
- **Founding Team Impact**: As a very early-stage company (6 people), new hires will be founding engineers with significant ownership, equity (1% - 2% range for some roles), and influence over the product and culture.
- **Compensation**: Offers competitive salary in the 90th percentile+ (e.g., $225k-$315k base for some roles), plus meaningful equity.
- **Benefits**: Premium health, dental, and vision insurance for employee and family; unlimited PTO; generous parental leave; 401K with salary matching; team offsites and retreats.
- **Work Environment**: Described as a team of builders, mathematicians, and systems thinkers. They emphasize moving fast without cutting corners. The hiring process is rigorous and transparent.
- **Location**: Based in San Francisco, CA. Roles are listed as on-site.

## Sources
1. [sf-tensor.com](https://sf-tensor.com/)
2. [sf-tensor.com/careers](https://sf-tensor.com/careers)
3. [ycombinator.com](https://www.ycombinator.com/companies/sf-tensor)
4. [sf-tensor.com/news](https://sf-tensor.com/news/introducing-sf-tensor)
5. [jobs.ashbyhq.com](https://jobs.ashbyhq.com/sf-tensor)

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