---
title: 'Member of Technical Staff - Research Intern at Architect Labs'
canonical: 'https://feeny.ai/job/member-of-technical-staff-research-intern-architect-labs-palo-alto-npvbryfgg7zp'
type: 'job'
last_seen: '2026-09-09'
---

# Member of Technical Staff - Research Intern at Architect Labs

- **Company:** Architect Labs
- **Location:** Palo Alto, CA
- **Employment:** full-time
- **Work type:** onsite
- **Posted:** 2026-02-10
- **Last confirmed live:** 2026-09-09
- **Apply:** https://jobs.ashbyhq.com/architect/1999377b-b23b-461f-b79a-d4edce0d46b1

## Job description

## About Architect

Architect is an AI research and product lab for chip design. We build AI models and systems that can explore, design, optimize, and verify new hardware. Our goal is to reimagine chip design using AI, cut down ASIC design time and cost, and enable a new era of ultra-efficient, domain-specific chips powering the future of computation.

Born out of Stanford, our team blends researchers and engineers from Anthropic, DeepMind, Meta, Apple, Intel, and other frontier labs. Backed by leading VCs and angels, including the Chief Scientist at Google, Stanford professors, and founders of chip companies, Architect operates in stealth, pushing the limits of AI4EDA and building the intelligence layer for the hardware revolution.

## WHAT YOU'LL DO

As a Research Intern at Architect, you will spend 3 months working alongside the founding team to push the boundaries of how AI models explore and optimize hardware designs. This is a high-impact role where your experiments will directly influence our core modeling roadmap.

- Responsible for co-designing and implementing the Reinforcement Learning experiments (GRPO/PPO/DPO), training data mixes and reward signal explorations.
- Contribute to research on post-training techniques, running ablation studies to improve model reasoning and alignment capabilities.
- Implement and test new algorithms for model fine-tuning and evaluation, helping to translate research papers into working prototypes.
- Analyze experimental results and debug model behavior to help establish best practices for our training recipes.

## WHAT WE'D LIKE TO SEE

Qualifications & Skills:

- Education: Currently pursuing a PhD or Master’s degree in Computer Science, Machine Learning, Mathematics, or a related field. Exceptional undergraduates with strong research experience are also encouraged to apply.
- RL Knowledge: Strong academic understanding or project experience with Reinforcement Learning (e.g., PPO, DPO, GRPO). You should be comfortable reading and implementing concepts from recent research papers.
- Coding Proficiency: Strong proficiency in Python and deep learning frameworks (PyTorch). You should be able to write clean, efficient research code.
- Research Mindset: A fast learner who is comfortable navigating ambiguity. You enjoy analyzing complex problems and iterating quickly on experiments.
- LLM Familiarity: Experience with training or fine-tuning Large Language Models (LLMs) or familiarity with the modern NLP stack (Transformers, HuggingFace, etc.).

## BONUS:

- Previous internship experience at frontier AI labs or research organizations.
- Publications (or submissions) in top ML venues (NeurIPS, ICLR, ICML) or EDA venues (DAC, ICCAD).
- Familiarity with hardware design concepts (Verilog, RTL, EDA tools), though not required.

## WHAT WE OFFER

- Competitive internship stipend
- Mentorship from a team of researchers and engineers from Anthropic, DeepMind, Meta, and Stanford
- Opportunity to work on 0→1 problems in AI-driven chip design

## About Architect Labs

## Company Overview
- **One-liner**: Architect Labs builds an AI system that explores, designs, and provably verifies custom chips for the world's most demanding AI workloads.
- **Entity Type**: Private (Seed stage – $24M raised)
- **Headquarters**: United States (specific city not publicly available)
- **Founded**: Not publicly available
- **Founders**: Ebrahim Hussain & Aaditya Subedi

## Core Business
- **Primary industry**: Semiconductor / AI chip design
- **Target customers**: B2B, Enterprise (companies needing custom silicon for frontier AI models)
- **Mission**: "Frontier AI for Silicon" – to enable custom chip co-design by rethinking the entire design process from first principles, accelerating development cycles and allowing organizations to own their hardware.

## Products & Services
- **AI-Driven Chip Co-Design System**: A self-improving AI platform that explores, designs, and formally verifies chip architectures. It co-optimizes compilers, system software, runtimes, and models, collapsing the distance between model evolution and silicon deployment. Type: AI platform / service.

## Market Standing
- **Valuation**: Not disclosed
- **Key Metric**: Total Funding – $24M seed round (June 2026)
- **Notable Investors/Partners**: Kindred Ventures (lead), TQ Ventures (lead), Race Capital, Together Fund, plus angel investors Jeff Dean, Srinivas Narayanan, Lukasz Kaiser, Aravind Srinivas, Kunle Olokotun, Trevor Blackwell, Dr. Alex Wissner-Gross, and executives from NVIDIA, Google, OpenAI, Perplexity.
- **Growth Signals**: 
  - Raised $24M seed in June 2026 from top-tier investors.
  - Assembled an elite team of researchers and engineers from Anthropic, xAI, Google DeepMind, Meta, Intel, and Samsung.
  - Founders have backgrounds at Apple’s silicon teams and Tesla’s AI5 chip program; collectively the team has taped out 80+ production chips and managed multi-billion-dollar product lines.

## Competitive Advantages
- **First-principles approach**: Not adapting AI to legacy chip workflows but rebuilding the entire chip design process from scratch.
- **Provable verification**: AI system includes formal verification, reducing risk and iteration in chip design.
- **Convergent expertise**: Rare combination of frontier AI research and deep silicon design experience within the same team.
- **Self-improving system**: The platform learns from each design cycle, creating a flywheel of faster, better designs.

## Strategic Focus
- **Democratize custom chip co-design**: Make specialized silicon accessible beyond a handful of incumbents.
- **Shorten chip development cycles**: Move from multi-year cycles to software-like velocity.
- **Unified design space**: Enable synchronous optimization of models, compilers, runtimes, and hardware.

## Why Work Here
- **Frontier work**: Tackle one of the most ambitious problems in modern technology – AI-driven chip design.
- **Small, exceptional team**: Emphasis on ownership ("Surface Area"), relentless execution, and long-term craft.
- **Culture**: Values include depth, intellectual rigor, and rapid prototyping. Team members come from top AI and semiconductor labs.
- **Location/Policy**: Not explicitly stated; likely US-based with some flexibility. The careers page highlights a fully in-person culture for deep collaboration (inferred from "small team" and "end-to-end ownership"). 
- **Perks**: Not detailed, but the work involves cutting-edge research and infrastructure.

## Sources
1. [architectlabs.com](https://architectlabs.com/)
2. [jobs.ashbyhq.com](https://jobs.ashbyhq.com/architect)
3. [linkedin.com](https://www.linkedin.com/company/architectlab)
4. [kindredventures.com](https://kindredventures.com/announcement/architect-labs-democratizing-custom-chip-co-design/)

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