--- title: 'Member of Technical Staff - Software at Architect Labs' canonical: 'https://feeny.ai/job/member-of-technical-staff-software-architect-labs-palo-alto-nhxbtrya6akb' type: 'job' last_seen: '2026-09-09' --- # Member of Technical Staff - Software at Architect Labs - **Company:** Architect Labs - **Location:** Palo Alto, CA - **Employment:** full-time - **Work type:** onsite - **Posted:** 2026-05-26 - **Last confirmed live:** 2026-09-09 - **Apply:** https://jobs.ashbyhq.com/architect/2b85a475-f762-46a3-8d29-44ace976aec2 ## Job description ## ABOUT ARCHITECT Architect is a frontier AI lab for chip design. We build AI models and tools for on-demand custom ASICs at scale. Our goal is to co-design custom ASICs alongside evolving ML workloads, and enable a new era of domain-specific chips that unlock capabilities impossible with current hardware paradigms. Born out of Stanford Research, our team blends AI with Silicon with a founding team from Anthropic, Google DeepMind, Meta SuperIntelligence, xAI, Apple and Intel. ## WHAT YOU’LL DO As Member of the Technical Staff - Software at Architect, you’ll build the core platform that powers AI-driven chip design. You’ll own the full stack, developing intuitive, high-performance systems using TypeScript, Python, and modern frameworks, while integrating cutting-edge AI features and models in collaboration with our ML team. This is a foundational engineering role where you’ll design the architecture for the platform, and build seamless interfaces for chip engineers to interact with intelligent agents. You’ll shape the developer experience end-to-end—from indexing massive codebases to building scalable databases—and make critical technical decisions that define the product. Expect to ship fast, iterate daily, and leave your fingerprints on every layer of a system redefining how hardware gets built. ## WHAT WE’D LIKE TO SEE - Education: BS/MS in Computer Science, Computer Engineering, Mathematics or a related field. - Core Skills: Proficiency in TypeScript, Python, & C++ and extensive full-stack experience. - Technical Experience: Strong full-stack / backend experience, designing RESTful APIs, working with relational or NoSQL databases. Familiarity with frontend component libraries and state management patterns. As well as experience developing AI coding agents. Finally, a proven track record of shipping features quickly and iterating fast based on feedback. - Systems Knowledge: Comfortable in Linux environments, using virtual environments, Docker, and version control (Git). Experience setting up or maintaining CI/CD (GitHub Actions, Jenkins, etc.) - Bonus: - Previous experience working at an AI startup, or building coding agent platform at AI coding assistant companies. - Founding engineer or early hire at a high-growth startups, ex-Quant. - Competitive programming experience, Recognition at IMO, IOI, IPho etc. or published research. - Exposure to cloud platforms (AWS, GCP, Azure) and container orchestration (Kubernetes). - Demonstrated ability to learn new technologies and frameworks on the fly. ## WHAT WE OFFER - Competitive salary and equity - Fast-paced startup with autonomy and visible impact - Cutting-edge AI-driven chip design challenges ## About Architect Labs ## Company Overview - **One-liner**: Architect Labs builds an AI system that explores, designs, and provably verifies custom chips for the world's most demanding AI workloads. - **Entity Type**: Private (Seed stage – $24M raised) - **Headquarters**: United States (specific city not publicly available) - **Founded**: Not publicly available - **Founders**: Ebrahim Hussain & Aaditya Subedi ## Core Business - **Primary industry**: Semiconductor / AI chip design - **Target customers**: B2B, Enterprise (companies needing custom silicon for frontier AI models) - **Mission**: "Frontier AI for Silicon" – to enable custom chip co-design by rethinking the entire design process from first principles, accelerating development cycles and allowing organizations to own their hardware. ## Products & Services - **AI-Driven Chip Co-Design System**: A self-improving AI platform that explores, designs, and formally verifies chip architectures. It co-optimizes compilers, system software, runtimes, and models, collapsing the distance between model evolution and silicon deployment. Type: AI platform / service. ## Market Standing - **Valuation**: Not disclosed - **Key Metric**: Total Funding – $24M seed round (June 2026) - **Notable Investors/Partners**: Kindred Ventures (lead), TQ Ventures (lead), Race Capital, Together Fund, plus angel investors Jeff Dean, Srinivas Narayanan, Lukasz Kaiser, Aravind Srinivas, Kunle Olokotun, Trevor Blackwell, Dr. Alex Wissner-Gross, and executives from NVIDIA, Google, OpenAI, Perplexity. - **Growth Signals**: - Raised $24M seed in June 2026 from top-tier investors. - Assembled an elite team of researchers and engineers from Anthropic, xAI, Google DeepMind, Meta, Intel, and Samsung. - Founders have backgrounds at Apple’s silicon teams and Tesla’s AI5 chip program; collectively the team has taped out 80+ production chips and managed multi-billion-dollar product lines. ## Competitive Advantages - **First-principles approach**: Not adapting AI to legacy chip workflows but rebuilding the entire chip design process from scratch. - **Provable verification**: AI system includes formal verification, reducing risk and iteration in chip design. - **Convergent expertise**: Rare combination of frontier AI research and deep silicon design experience within the same team. - **Self-improving system**: The platform learns from each design cycle, creating a flywheel of faster, better designs. ## Strategic Focus - **Democratize custom chip co-design**: Make specialized silicon accessible beyond a handful of incumbents. - **Shorten chip development cycles**: Move from multi-year cycles to software-like velocity. - **Unified design space**: Enable synchronous optimization of models, compilers, runtimes, and hardware. ## Why Work Here - **Frontier work**: Tackle one of the most ambitious problems in modern technology – AI-driven chip design. - **Small, exceptional team**: Emphasis on ownership ("Surface Area"), relentless execution, and long-term craft. - **Culture**: Values include depth, intellectual rigor, and rapid prototyping. Team members come from top AI and semiconductor labs. - **Location/Policy**: Not explicitly stated; likely US-based with some flexibility. The careers page highlights a fully in-person culture for deep collaboration (inferred from "small team" and "end-to-end ownership"). - **Perks**: Not detailed, but the work involves cutting-edge research and infrastructure. ## Sources 1. [architectlabs.com](https://architectlabs.com/) 2. [jobs.ashbyhq.com](https://jobs.ashbyhq.com/architect) 3. [linkedin.com](https://www.linkedin.com/company/architectlab) 4. [kindredventures.com](https://kindredventures.com/announcement/architect-labs-democratizing-custom-chip-co-design/) ## Other roles at Architect Labs - [Member of Technical Staff - Formal Verification](https://feeny.ai/job/member-of-technical-staff-formal-verification-architect-labs-palo-alto-1nmp3kygr0de) — Palo Alto, CA - [Microarchitect / RTL Design - Network Datapath & MAC Engine](https://feeny.ai/job/microarchitect-rtl-design-network-datapath-mac-engine-architect-labs-palo-alto-pgg4djxk6n5q) — Palo Alto, CA - [Microarchitect / RTL Design - Memory Subsystem](https://feeny.ai/job/microarchitect-rtl-design-memory-subsystem-architect-labs-palo-alto-y0j0qnyxfc2j) — Palo Alto, CA - [Microarchitect / RTL Design - Interconnect & Fabric](https://feeny.ai/job/microarchitect-rtl-design-interconnect-fabric-architect-labs-palo-alto-7eqe6bxeewnb) — Palo Alto, CA - [Member of Technical Staff - Design Verification](https://feeny.ai/job/member-of-technical-staff-design-verification-architect-labs-palo-alto-03kf2jzzyf0m) — Palo Alto, CA - [Member of Technical Staff - Design Verification](https://feeny.ai/job/member-of-technical-staff-design-verification-architect-labs-bengaluru-jf0s78hhyqrm) — Bengaluru, India - [Member of Technical Staff - Formal Methods](https://feeny.ai/job/member-of-technical-staff-formal-methods-architect-labs-palo-alto-3np6mmsb8wz6) — Palo Alto, CA - [Member of Technical Staff - Applied AI](https://feeny.ai/job/member-of-technical-staff-applied-ai-architect-labs-palo-alto-fn81mfsywneh) — Palo Alto, CA - [General Application](https://feeny.ai/job/general-application-architect-labs-palo-alto-7hmn44c5b1c7) — Palo Alto, CA - [Member of Technical Staff - Microarchitect / RTL Design](https://feeny.ai/job/member-of-technical-staff-microarchitect-rtl-design-architect-labs-palo-alto-1afm42nm1f35) — Palo Alto, CA