---
title: 'Package & SI/PI - Senior/Staff Packaging Engineer - Electro-Thermal at Eliyan'
canonical: 'https://feeny.ai/job/package-si-pi-senior-staff-packaging-engineer-electro-thermal-eliyan-bay-area-gadvccdbct45'
type: 'job'
last_seen: '2026-09-14'
---

# Package & SI/PI - Senior/Staff Packaging Engineer - Electro-Thermal at Eliyan

- **Company:** Eliyan
- **Location:** Bay Area
- **Employment:** full-time
- **Work type:** onsite
- **Posted:** 2025-10-20
- **Last confirmed live:** 2026-09-14
- **Apply:** https://jobs.lever.co/eliyan/4ba2b915-46fe-47d1-bdf0-dd4347e07b88

## Job description

Join the leading chiplet interconnect startup! We are seeking an experienced Senior/Staff Packaging Engineer specializing in electro-thermal simulation to join our advanced packaging team. You will develop comprehensive thermal and electrical simulations for next-generation semiconductor packaging solutions, including 2.5D/3D IC integration, chiplet-based systems, and advanced heterogeneous integration technologies. This role is critical in enabling high-performance computing, AI accelerators, and advanced chiplet architectures. We offer a fun work environment with excellent benefits. ONSITE M-F

Key Responsibilities:

- Develop detailed thermal models for [2.5D/3D](http://2.5D/3D) IC packages, chiplets, and multi-die systems; perform steady-state and transient thermal analysis with hotspot identification
- Execute power integrity (PI) and IR drop analysis; optimize power distribution networks (PDN) and power delivery architectures
- Conduct electromigration (EM) and reliability analysis for interconnects, bumps, TSVs, and redistribution layers (RDL)
- Develop chip-package co-simulation workflows using industry-standard EDA tools (ANSYS RedHawkSC, RHSC-ET, SIwave, Cadence Sigrity/Clarity)
- Create hierarchical compact macro models (CMM) and reduced-order thermal models for earlystage design optimization
- Automate simulation workflows using Python, TCL, and Shell scripting; build design space exploration tools
- Collaborate with silicon design, package design, and manufacturing teams on design-for-reliability (DFR) initiatives
- Support customer engagements with technical analysis and present findings to stakeholders

Minimum Qualifications:

-

Education:

- PhD in Electrical/Mechanical Engineering, or related field with focus on thermal management, power delivery, or electronic packaging (Master's with 5+ years experience considered)
- Strong academic background in power integrity, signal integrity, and thermal management for advanced packaging

Technical Skills:

- Expert proficiency in: ANSYS RedHawk-SC, RHSC Electrothermal, Totem, PathFinder, SIwave, HFSS, Q3D; Cadence Voltus, Sigrity, Clarity; Synopsys RedHawk Fusion, PrimeTime, ICC2
- Experience with physical design tools (Cadence Innovus, Synopsys ICC2, Siemens Calibre) and RTLto-GDSII flows
- Strong programming/scripting: Python, C/C++, Tcl, Shell (bash); Verilog/VHDL/SystemVerilog for verification
- Knowledge of advanced packaging: [2.5D/3D](http://2.5D/3D) ICs (CoWoS, InFO, EMIB), chiplets, TSVs, interposers, FOWLP, RDL design

Domain Expertise:

- Deep understanding of EM/IR analysis, power integrity, thermal physics, and electrothermal cosimulation
- Expertise in heat transfer principles (conduction, convection, radiation), thermal material properties, and CTE mismatch
- Knowledge of chiplet standards (UCIe and BoW), die-to-die interfaces, and wafer-scale integration
- Hands-on experience with semiconductor package thermal/electrical analysis and tape-outs

Ideal Qualifications:

- Familiarity with machine learning applications in EDA and design optimization
- Experience with HPC, AI/ML accelerator packaging, or co-packaged optics (CPO)
- Background in reliability testing (thermal cycling, HTOL, THB) and measurement correlation

What we are looking for:

- Strong analytical mindset with expertise across multiple physics domains (thermal, electrical, mechanical)
- Excellent communication skills to present complex technical concepts to diverse audiences
- Cross-functional collaboration abilities to work with silicon, package, product, and manufacturing teams
- Self-motivated professional who thrives in fast-paced environments with minimal supervision
- Continuous learner staying current with emerging technologies; innovation-driven with creative problem-solving
- Results-oriented engineer delivering high-quality work to enable product milestones on schedule

## About Eliyan

## Company Overview
- **One-liner**: Eliyan develops high-bandwidth, low-power chiplet interconnect technology (NuLink) that solves data bottlenecks in AI and data center chips.
- **Entity Type**: Private (Series C-II)
- **Headquarters**: Santa Clara, California, United States
- **Founded**: 2021
- **Founders**: Ramin Farjadrad (CEO), Syrus Ziai (VP Engineering), Patrick Soheili (Chief Strategy & Business Officer)

## Core Business
- Primary industry: Semiconductor Manufacturing (chiplet interconnect IP and PHY silicon)
- Target customers: B2B – companies building custom AI chips (hyperscalers, chip designers, networking firms)
- Mission: “Revolutionize chiplet connectivity technologies by challenging the status quo to unleash the ultimate performance of smart systems of the future.”

## Products & Services
- **[NuLink™ D2D PHY](https://eliyan.com/about/)**: Die-to-die interconnect PHY supporting industry standards (BoW and UCIe) and proprietary simultaneous-bidirectional (SBD) technology. Delivers 4× the bandwidth and 2× the power efficiency of alternatives in advanced or standard packaging, with bump pitches from 40–130 microns.
- **[NuLink™-XD](https://linkedin.com/company/eliyan-corporation)**: A new class of power-reach configurable 224G PAM4 SerDes for chip-to-chip and chip-to-module applications, targeting the lowest-power electro-optical modules for AI scale-up networks. Up to 40% lower power than competing solutions.

## Market Standing
- **Valuation**: $1 billion (as of July 2026 Series C)
- **Annual Revenue**: $3.5 million (2025); forecasts hundreds of millions by end of 2027 [reuters.com](https://www.cbinsights.com/company/eliyan)
- **Total Funding**: $295 million (conflicting reports: other sources state $150M total); includes $145M Series C led by Seligman Ventures (July 2026), $60M Series B led by Samsung Catalyst Fund and Tiger Global (March 2024), $40M Series A led by Tracker Capital (Nov 2022).
- **Notable Investors/Partners**: Seligman Ventures (board seat for Umesh Padval), Cisco Systems, Lumentum, Samsung Catalyst Fund, Tiger Global Management, Tracker Capital, VentureTech Alliance.
- **Growth Signals**: Headcount of 73 employees with +6.7% monthly growth; 21 active job postings (quarterly trend +2,000%); expects to start chiplet shipments in 2026; expanding across 6 countries (US, Germany, Netherlands, Canada, India, Israel).

## Competitive Advantages
- Breakthrough die-to-die interconnect architecture (invented by founder Ramin Farjadrad in 2016) that achieves 4× bandwidth and 2× power efficiency versus competing IP.
- Works with standard packaging (wide range of bump pitches), reducing cost and complexity for chip designers.
- Independent alternative to Broadcom/Marvell in the chiplet interconnect space, giving custom AI chip makers a neutral, high-performance option.

## Strategic Focus
- Solving the growing data-movement bottleneck in AI compute (GPUs often idle 30–40% waiting for data).
- Scaling NuLink and NuLink-XD platforms to support both chip-to-chip and chip-to-module applications for next-generation AI infrastructure.
- Ramping chiplet production and licensing revenue, targeting hundreds of millions in sales by 2027.

## Why Work Here
- On-site culture with offices in Santa Clara (HQ), Vancouver (BC), and other global locations; no remote/hybrid mentioned.
- Engineering-heavy team (54% technical roles) with a fast-paced startup environment and deep expertise from companies like Marvell, Intel, AMD, and Synopsys.
- Opportunity to work on cutting-edge semiconductor interconnect technology that directly impacts AI performance.
- Active hiring across digital design, verification, DFT, physical design, optical engineering, and program management.

## Sources
1. [eliyan.com/about](https://eliyan.com/about/)
2. [jobs.lever.co/eliyan](https://jobs.lever.co/eliyan)
3. [linkedin.com/company/eliyan-corporation](https://linkedin.com/company/eliyan-corporation)
4. [cbinsights.com/company/eliyan](https://www.cbinsights.com/company/eliyan)
5. [reuters.com (via CNA)](https://www.cbinsights.com/company/eliyan) (Note: embedded Reuters article on CB Insights page)
6. [eliyan.com/careers](https://eliyan.com/careers/)

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