---
title: 'PCB Layout Engineer at DensityAI'
canonical: 'https://feeny.ai/job/pcb-layout-engineer-densityai-mountain-view-y8hzbqrkdhya'
type: 'job'
last_seen: '2026-09-12'
---

# PCB Layout Engineer at DensityAI

- **Company:** DensityAI
- **Location:** Mountain View, CA
- **Compensation:** $150k–$215k
- **Posted:** 2026-08-06
- **Last confirmed live:** 2026-09-12
- **Apply:** https://job-boards.greenhouse.io/densityai/jobs/4357004009

## Job description

## About the role

Own the board-level physical design that turns our accelerator silicon into systems. You'll take high-speed, high-power designs from placement through fabrication release — defining stackups, escaping large fine-pitch BGAs, routing multi-hundred-amp power delivery, and holding the constraint discipline that lets a channel close margin in the lab and not just in simulation. You'll work at the seam where the package meets the system, partnering with signal and power integrity, packaging, and hardware systems, and directly with the fabrication and assembly partners who build what you release. When a board comes back and something doesn't behave, you're one of the people who knows why.

What will you do

- Own board-level physical design for the systems our AI accelerators ship in stackup and impedance definition, placement, high-speed routing, and fabrication and assembly release packages
- Own high-current power delivery layout and large fine-pitch BGA escape for advanced accelerator packages
- Drive DFM/DFA with PCB fabrication and contract manufacturing partners, and support board bring-up and debug
- Use and develop AI assisted tool flows to accelerate layout, review, and design-rule checking

## What we're looking for

- Exceptional abilities in constraint-driven layout of complex high-speed, high-current boards: controlled impedance and stackup definition, return-path and crosstalk management, length and skew matching, and via optimization
- 8+ years of PCB layout experience on server, networking, or accelerator-class systems at high layer counts
- Hands-on with industry-standard layout tools (Cadence Allegro, Siemens Xpedition, Altium, or equivalent) and release formats (Gerber, ODB++, IPC-2581)
- Demonstrated ability to work closely with signal-integrity, power-integrity, packaging, and hardware systems teams to implement and close complex constraint sets across package and board
- (Optional) 2.5D / 3D and multi-die package interfaces (CoWoS, EMIB, chiplets, HBM), rigid-flex or backplane design, CAD automation scripting, IPC CID / CID+, or overseas PCB fabrication and PCBA partner management

Full compensation packages are based on candidate experience and relevant certifications.

California pay range $150,000—$215,000 USD

## Compensation

Final offers depend on level, location, and skills relevant to the role. Additional compensation: equity grant per company guidelines; medical / dental / vision; 401(k); standard PTO.

Visa Sponsorship

DensityAI sponsors qualified candidates for H-1B, O-1, TN, E-3, and other employment-based visas, and we welcome applicants on F-1 OPT and STEM-OPT. Work authorization is required at start; we provide immigration support to secure or transfer status.

Export Controls

Aspects of this role may involve access to information subject to U.S. export controls (EAR/ITAR). We may discuss licensing or scope adjustments during the interview.

## Equal Opportunity

DensityAI is an Equal Opportunity Employer. We do not discriminate on the basis of race, color, religious creed, national origin, ancestry, physical or mental disability, medical condition, genetic information, marital status, sex, gender, gender identity, gender expression, age (40+), sexual orientation, military or veteran status, pregnancy, or any other status protected by law. We comply with the California CROWN Act and provide reasonable accommodations on request.

## About DensityAI

## Company Overview
- **One-liner**: DensityAI is building a new generation of AI accelerators around a novel memory architecture, designed specifically for frontier-scale LLM inference, integrating silicon, packaging, kernels, and serving into a single optimized system.
- **Entity Type**: Private (Seed Stage)
- **Headquarters**: Mountain View, California, United States
- **Founded**: 2024
- **Founders**: Srikanth Arekapudi (Co-Founder), Bill Chang (Co-Founder, President, CTO)

## Core Business
- **Primary industry/industries**: AI Hardware (AI Accelerators / Semiconductors), Artificial Intelligence Inference Infrastructure
- **Target customers**: B2B / Enterprise — specifically companies deploying frontier-scale large language models (LLMs) that require high-bandwidth, high-capacity inference compute.
- **Mission or purpose statement**: Building the world’s fastest inference solution for frontier models, solving the memory wall problem through novel memory placement rather than traditional architecture workarounds.

## Products & Services
- **DensityAI Accelerator (Platform)**: A full-stack AI inference solution — from silicon die and packaging (tiled multi-die architecture) to system rack and software kernel stack. Designed to bridge the gap between HBM-based GPUs (high capacity, low bandwidth utilization) and SRAM-based meshes (high bandwidth, low capacity). The company claims target compute utilization of ≥90% for production LLM workloads.

## Market Standing
- **Valuation/Market Cap**: Not publicly available (stealth stage)
- **Key Metric**: Total Funding — At least one Seed Round completed (Sep 2025) and earlier Seed Round (Sep 2024). Specific amounts not disclosed; operates in stealth mode.
- **Notable Investors/Partners**: Dolby Family Ventures, Firestreak Ventures, imec.xpand, NextGen Venture Partners, South Park Commons (6 total investors per PitchBook)
- **Growth Signals**: Headcount grew +450% monthly (from small base to ~9 employees); team includes alumni from Tesla, Google, Toyota North America, and multiple stealth AI startups; 2 active job postings as of mid-2025; founding team has prior experience shipping supercomputing clusters and designing silicon for the world’s largest production inference engines.

## Competitive Advantages
- **Novel memory architecture**: Integrates memory directly into the compute stack, avoiding the “disaggregation penalty” of traditional GPU designs — no signals bouncing across substrates, eliminating unnecessary bottlenecks.
- **Full-stack co-design**: Silicon, packaging, kernels, and serving are all designed together as one system, enabling tight integration from compute organization to software architecture.
- **Performance target**: Aims to beat GPUs on both energy and speed for large-model, long-context workloads, and beat SRAM-based designs on model size and reliability — addressing a clear gap in the current market.

## Strategic Focus
- **Current priorities**: Scaling the engineering team (open roles: Compiler Engineer, Physical Design Engineer, Senior Design Verification Engineer, Site Reliability Engineer, Corporate Finance Manager, IT Support Engineer); transitioning from stealth to production-ready hardware; proving the full-stack architecture at rack scale.
- **Direction for growth**: Continue refining tile-based multi-die packaging, building out the software/kernel stack, and preparing for broader deployment and customer acquisition in the frontier AI inference market.

## Why Work Here
- **Culture highlights**: A deep-tech, hard-engineering culture focused on a fundamental challenge in AI hardware — the memory wall. The team is intentionally small and elite (~9 people), with a high bar for talent. The founders emphasize “building with us” and a collaborative approach across the full stack.
- **Remote/hybrid/office policy**: The company has offices in Mountain View, CA (HQ) and South Korea. Roles appear to require on-site or hybrid presence given the hardware-focused nature of the work.
- **Notable perks or engineering culture**: Opportunity to work on cutting-edge AI silicon from concept to rack; direct exposure to all layers of the stack; team composition includes veterans from Tesla, Google, and major production inference engine builds; fast-moving startup environment with significant autonomy and impact.

## Sources
1. [densityai.com](https://www.densityai.com/) — Company website
2. [linkedin.com/company/densityai](https://www.linkedin.com/company/densityai) — LinkedIn company page
3. [pitchbook.com/profiles/company/820064-17](https://pitchbook.com/profiles/company/820064-17) — PitchBook profile (funding, investors, overview)
4. [theorg.com/org/densityai](https://theorg.com/org/densityai) — The Org company profile
5. [densityai.com/join/](https://www.densityai.com/join/) — Careers page

## Other roles at DensityAI

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- [People Operations Specialist](https://feeny.ai/job/people-operations-specialist-densityai-mountain-view-kj9891vvpadp) — Mountain View, CA
- [Talent Acquisition Specialist](https://feeny.ai/job/talent-acquisition-specialist-densityai-mountain-view-6d230ekwm9j1) — Mountain View, CA
- [Thermal Engineer](https://feeny.ai/job/thermal-engineer-densityai-mountain-view-gby3yn41gyxz) — Mountain View, CA
- [Package Layout Engineer](https://feeny.ai/job/package-layout-engineer-densityai-mountain-view-b32qj1gj1ddf) — Mountain View, CA
- [Packaging Mechanical Engineer](https://feeny.ai/job/packaging-mechanical-engineer-densityai-mountain-view-q29p3121g5c2) — Mountain View, CA
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- [Signal Integrity & Power Integrity Engineer](https://feeny.ai/job/signal-integrity-power-integrity-engineer-densityai-mountain-view-2x6k3vehbd9z) — Mountain View, CA