--- title: 'PCB Layout Engineering Lead at Cerebras Systems' canonical: 'https://feeny.ai/job/pcb-layout-engineering-lead-cerebras-systems-united-states-em00ewnccr6z' type: 'job' last_seen: '2026-09-08' --- # PCB Layout Engineering Lead at Cerebras Systems - **Company:** [Cerebras Systems](https://feeny.ai/companies/cerebras-systems) - **Location:** United States - **Employment:** full-time - **Work type:** remote - **Posted:** 2026-09-03 - **Last confirmed live:** 2026-09-08 - **Apply:** https://jobs.ashbyhq.com/cerebras/e616412a-6412-4f0d-93b9-47644d3e99fa ## Job description Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. This architecture allows Cerebras to deliver industry-leading training and inference speeds; over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. Cerebras works with the leading model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership https://openai.com/index/cerebras-partnership/ with Cerebras, to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. Cerebras is seeking an exceptional PCB Layout Lead to own the physical implementation of complex, high-performance printed circuit boards for AI systems. This role will translate schematics and engineering requirements into production-ready layouts, optimizing signal integrity, power integrity, thermal performance, reliability, and manufacturability. ## Responsibilities - Own multilayer PCB layout from initial component placement through fabrication and assembly release. - Translate schematics, mechanical constraints, and electrical requirements into constraint-driven board designs using industry-standard PCB layout tools. - Define and implement board stackups, controlled-impedance structures, routing rules, reference planes, return paths, and length- and phase-matching constraints. - Place and route high-speed digital, high-current power, and sensitive analog circuits, including dense BGA fanout and differential interfaces. - Apply signal-integrity and power-integrity best practices to minimize crosstalk, discontinuities, noise, voltage drop, and electromagnetic interference. - Collaborate with electrical, SI/PI, mechanical, thermal, compliance, manufacturing, and test engineers to establish constraints and resolve layout issues. - Work with fabrication and assembly partners to select materials, validate stackups and via structures, and improve yield, cost, and schedule. - Perform design reviews and DFM, DFA, and DFT checks; generate and verify fabrication drawings, assembly drawings, drill data, Gerbers, ODB++, IPC-2581, and related release packages. - Maintain component footprints, padstacks, design libraries, layout standards, and release documentation. - Support prototype builds, board bring-up, failure analysis, and layout revisions through production. ## Minimum Qualifications - Bachelor’s degree in electrical engineering, electronics engineering, or a related field, or equivalent practical experience. - 10+ years of hands-on experience laying out complex, high-speed, multilayer printed circuit boards. - Expertise with Cadence Allegro PCB Designer and Constraint Manager; experience with Altium Designer or equivalent tools is also relevant. - Strong knowledge of component placement, controlled-impedance routing, differential pairs, length matching, return-path continuity, and power distribution. - Experience with dense BGA escape routing, HDI structures, blind and buried vias, microvias, via-in-pad, and backdrilling. - Working knowledge of signal integrity, power integrity, EMI/EMC, thermal design, creepage and clearance, and high-current routing. - Experience applying IPC standards and fabrication, assembly, test, and manufacturability requirements. - Ability to create and review complete PCB fabrication and assembly release packages. - Ability to thrive in a fast-paced, dynamic environment and adapt to changing priorities. - Excellent collaborative and interpersonal skills with multi-disciplined teams. - Experience working on server hardware, AI accelerators, hardware accelerator, datacenter, AI Hardware, enterprise product, GPU, CPU, TPU, server platform etc. ## Preferred Qualifications - Experience designing large, high-layer-count boards for compute, networking, server, or AI accelerator systems. - Experience routing high-speed interfaces such as DDR4/DDR5, PCIe Gen4/Gen5 or later, Ethernet, USB, and multi-gigabit SerDes. - Experience with high-current, low-voltage power delivery, VRM placement, decoupling strategy, copper balancing, and thermal optimization. - Experience developing Allegro SKILL, scripts, or automation that improves layout quality and release efficiency. - Demonstrated success delivering first-pass functional boards and supporting products from prototype through volume production. Location: Remote. Sunnyvale, CA (Hybrid) is highly preferred. - The base salary range for this position is $210,000 – $230,000+ annually. Actual compensation may include bonus and equity, and will be determined based on factors such as experience, skills, and qualifications. ## Why Join Cerebras People who are serious about software make their own hardware. At Cerebras, we have built a breakthrough architecture that is unlocking new opportunities for the AI industry. With dozens of model releases and rapid growth, we’ve reached an inflection point in our business. Members of our team tell us there are five main reasons they joined Cerebras: 1. Build a breakthrough AI platform beyond the constraints of the GPU. 2. Publish and open source their cutting-edge AI research. 3. Work on one of the fastest AI supercomputers in the world. 4. Enjoy job stability with startup vitality. 5. Our simple, non-corporate work culture that respects individual beliefs. Find out more about what it's like to work at Cerebras here https://www.cerebras.ai/join-us! Apply today and become part of the forefront of groundbreaking advancements in AI! Cerebras Systems is committed to creating an equal and diverse environment and is proud to be an equal opportunity employer. We celebrate different backgrounds, perspectives, and skills. We believe inclusive teams build better products and companies. We try every day to build a work environment that empowers people to do their best work through continuous learning, growth and support of those around them. This website or its third-party tools process personal data. For more details, click here https://www.cerebras.net/privacy/ to review our CCPA disclosure notice. ## About Cerebras Systems ## Company Overview - **One-liner**: Cerebras builds wafer-scale AI chips (the largest semiconductors ever made) and supercomputers that deliver up to 15x faster inference than GPUs, offered both on-premises and via cloud APIs. - **Entity Type**: Public (NASDAQ: CBRS) — filed for IPO and now listed on the Nasdaq. - **Headquarters**: Sunnyvale, California, United States - **Founded**: 2015 - **Founders**: Andrew Feldman, Gary Lauterbach, Michael James, Sean Lie, Jean-Philippe Fricker ## Core Business - **Primary industries**: Semiconductor manufacturing, AI computing hardware and software, cloud AI services. - **Target customers**: B2B – enterprises, government research labs, cloud service providers, and AI developers. - **Mission**: “Building impossible technologies so you can too” – accelerating AI through wafer-scale computing. ## Products & Services - **Wafer-Scale Engine (WSE-3)**: The world’s largest AI chip (215 mm²), 58x larger than a typical GPU, built for ultra‑fast AI training and inference. Manufactured by TSMC. - **CS-3 Supercomputer**: A single system powered by the WSE-3, delivering record-breaking AI performance for on-premises deployment. - **Cerebras AI Inference Cloud & Training Cloud**: Pay-as-you‑go APIs that provide drop‑in OpenAI‑compatible access to Cerebras’ hardware for serving, fine‑tuning, and pre‑training models. - **Condor Galaxy Network**: A series of supercomputers (e.g., CG‑1 with 4 exaFLOPs) built in partnership with G42 for high‑performance AI. ## Market Standing - **Valuation/Market Cap**: Not disclosed (recently public; market cap data not available in provided sources). - **Key Metric**: Annual revenue of $78.7 M (latest); total funding of $2.7 B across 15 rounds. - **Notable Investors/Partners**: G42, OpenAI (signed in 2026), Amazon Web Services (signed in 2026), Meta (Llama API), Perplexity, Mistral, Hugging Face, OpenRouter. - **Growth Signals**: - 34.3% YoY headcount growth (701 employees). - Rapid data center expansion across North America and Europe. - Won the HPCwire Readers’ & Editors’ Choice 2025 for Best AI Product/Technology. - Named to Forbes America’s Best Startup Employers 2026 and Fast Company Most Innovative Companies 2026 (AI). ## Competitive Advantages - **Wafer‑scale architecture**: Eliminates interconnect bottlenecks, reducing latency and delivering up to 15x faster inference than GPU clusters. - **Largest AI chip ever built**: 58x larger than any GPU, enabling massive on‑chip memory (SRAM) and compute density. - **Full‑stack offering**: Hardware + cloud APIs + on‑prem systems, giving customers deployment flexibility. - **Strong customer relationships**: Key contracts with OpenAI, AWS, G42, and Mayo Clinic (2024 Gordon Bell Prize work). ## Strategic Focus - **Scale inference capacity**: Building out data centers to become the world’s #1 provider of high‑speed AI inference. - **Deepen cloud partnerships**: Expanding pay‑as‑you‑go cloud access and enterprise deployments. - **Advance wafer‑scale technology**: Continuous R&D on WSE‑3 successors and software stack (compiler, ML workflows). - **Broaden model support**: Already serving Llama, Gemma, Qwen, Mistral, and more; integrating with Hugging Face and OpenRouter. ## Why Work Here - **Culture**: “Extraordinary people, breakthrough innovation, global impact” – the company highlights collaborative, low‑overhead teams with little bureaucracy. - **Work environment**: Hybrid/office with locations in Sunnyvale, San Diego, Toronto, and Bangalore. Inclusive and flexible policy. - **Perks**: Premium medical/dental/vision, life insurance, generous vacation, 401(k) and Group RRSP retirement plans, daily catered meals, healthy snacks, family‑friendly events (including CEO’s famous BBQ). - **Engineering focus**: Tackling fundamental challenges in chip design, system software, compiler technology, and ML workflows. Positions range from hardware (Design Verification, Manufacturing) to software (SRE, Compiler, Cloud). - **Philanthrophy**: Supports local communities and hosts students from around the world for Q&A. ## Sources 1. [cerebras.ai/company](https://www.cerebras.ai/company) 2. [cerebras.ai](https://www.cerebras.ai/) 3. [cerebras.ai/join-us](https://www.cerebras.ai/join-us) 4. [linkedin.com/company/cerebras-systems](https://www.linkedin.com/company/cerebras-systems) ## Other roles at Cerebras Systems - [Network Security Engineer](https://feeny.ai/job/network-security-engineer-cerebras-systems-sunnyvale-s1q0rza0gbsf) — Sunnyvale, CA - [Distributed Software Engineer](https://feeny.ai/job/distributed-software-engineer-cerebras-systems-sunnyvale-2y0byqqxk57d) — Sunnyvale, CA - [AI Inference Core - Infrastructure SW Engineer](https://feeny.ai/job/ai-inference-core-infrastructure-sw-engineer-cerebras-systems-sunnyvale-nbqee273jncn) — Sunnyvale, CA - [AI Inference Core - Senior SW Engineer for Platform & DevOps](https://feeny.ai/job/ai-inference-core-senior-sw-engineer-for-platform-devops-cerebras-systems-06p3hxeg5qb7) — Sunnyvale, CA - [AI Inference Core - SDET Technical Lead, Release Integration Testing](https://feeny.ai/job/ai-inference-core-sdet-technical-lead-release-integration-testing-cerebras-fvqxmj75wav1) — Sunnyvale, CA - [ML Systems Integration Engineer](https://feeny.ai/job/ml-systems-integration-engineer-cerebras-systems-sunnyvale-edvsd91tqp93) — Sunnyvale, CA - [Lead Systems Signal Integrity/Power Integrity Engineer](https://feeny.ai/job/lead-systems-signal-integrity-power-integrity-engineer-cerebras-systems-zqq3c0wfj2v1) — Sunnyvale, CA - [Power Engineering Architect](https://feeny.ai/job/power-engineering-architect-cerebras-systems-sunnyvale-xtzeptb5vdc0) — Sunnyvale, CA - [Network Security Engineer (Remote)](https://feeny.ai/job/network-security-engineer-remote-cerebras-systems-united-states-yfrjb08d4wh9) — United States - [Detection and Response Platform Engineer](https://feeny.ai/job/detection-and-response-platform-engineer-cerebras-systems-sunnyvale-gx4sa9aschnm) — Sunnyvale, CA