---
title: 'Principal Power Design Engineer at Delos Data Inc'
canonical: 'https://feeny.ai/job/principal-power-design-engineer-delos-data-inc-palo-alto-k4t1g4pn932e'
type: 'job'
last_seen: '2026-09-15'
---

# Principal Power Design Engineer at Delos Data Inc

- **Company:** Delos Data Inc
- **Location:** Palo Alto, CA
- **Employment:** full-time
- **Work type:** hybrid
- **Posted:** 2026-07-06
- **Last confirmed live:** 2026-09-15
- **Apply:** https://jobs.ashbyhq.com/delos-data/e52289d9-ea07-4460-8955-a5ab31b20d60

## Job description

Who we are: We are a stealth-mode startup building foundational technology to address performance, scalability, and resiliency challenges in large-scale AI data center clusters. We are backed by top-tier VC firms and notable angel investors. The company is led by experienced builders and operators who have founded companies, taken them to scale, and exited successfully. We work with a strong sense of unity and shared responsibility, and we expect trust, integrity, and respect in how we collaborate and make decisions. We hold ourselves accountable to one another and to the quality of the work we deliver. Headquartered in Silicon Valley, we operate across a mix of remote and on-site locations in the U.S. and Canada. We aim to create an environment where people are treated fairly, supported in their growth, and empowered to do meaningful work alongside others who take the craft seriously. About the role: We are seeking a Principal Power Design Engineer to own the design, implementation, and validation of the power delivery systems that support our high-performance AI compute hardware. AI compute systems create extreme, high-frequency transient current steps that can destabilize hardware, introduce power supply noise, and corrupt sensitive high-speed data links. In this role, you will be responsible for component selection, schematic design, layout oversight, and hands-on lab validation of high-current power subsystems. You will design and test multi-phase voltage regulators, point-of-load converters, and sequencing circuitry to ensure our systems remain stable under demanding, dynamic AI inference workloads. Some Recent Press: https://www.eetimes.com/startup-boosts-scale-up-to-1000-gpus-in-a-single-domain/ Key Responsibilities:

- Own hardware schematic design for multi-phase buck regulators, point-of-load converters, and power sequencing circuitry.
- Select critical power components, including passives, inductors, power stages, controllers, and supporting circuitry.
- Define placement and routing constraints for board-level power delivery networks, including decoupling capacitor strategy and high-current power paths.
- Work closely with package engineering to ensure clean power delivery handoff at the socket or package interface.
- Lead lab validation of power subsystems, including VRM efficiency, loop stability, DC IR drop, thermal behavior, and transient response.
- Use oscilloscopes, electronic loads, network analyzers, thermal cameras, and related lab equipment to characterize power rails under maximum dynamic load conditions.
- Partner with SI/PI engineers to measure and mitigate power supply noise and Power Supply Induced Jitter on sensitive high-speed lanes.
- Debug power integrity issues across board, package, silicon, firmware, workload, and system-level interactions.
- Contribute to design guidelines, validation plans, and best practices for power delivery across the company’s hardware platforms.

Required Skills and Qualifications:

- Extensive experience designing high-current, multi-phase DC-DC regulators for high-power ASICs, GPUs, processors, accelerators, or similar compute platforms.
- Strong background in power hardware design for systems with 500W+ devices or comparable high-current power delivery requirements.
- Deep understanding of board-level PDN (power delivery network) implementation, decoupling strategy, power sequencing, transient response, and voltage regulation.
- Hands-on experience with schematic capture and layout oversight for complex power delivery systems, preferably using tools such as Cadence Allegro or Concept.
- Strong lab validation skills using electronic loads, oscilloscopes, network analyzers for loop stability testing, thermal cameras, and related power measurement equipment.
- Experience characterizing VRM efficiency, bode plots, DC IR drop, ripple, noise, and transient behavior under dynamic workloads.
- Proficiency with SPICE-based time-domain circuit simulation or similar power simulation workflows.
- Ability to collaborate closely with SI/PI, package, hardware, firmware, and systems teams in a fast-moving engineering environment.

Desired Skills:

- Experience with power delivery for AI accelerators, GPUs, networking ASICs, switch ASICs, or high-performance server platforms.
- Familiarity with power integrity interactions affecting high-speed SerDes, PCIe, Ethernet, CXL, or other sensitive interfaces.
- Experience validating power systems under real workload conditions, including dynamic AI inference or high-utilization compute workloads.
- Exposure to package-level power delivery, socket interfaces, or advanced board/package co-design.
- Experience developing automated lab validation flows using Python or similar scripting languages.

Compensation: Target base salary for this role is $160,000 - $240,000 per year + meaningful equity + benefits + 401k. Our salary ranges are determined by role, level, experience, and location. We are an equal opportunity employer. We value a range of perspectives and experiences and make employment decisions based on merit and business needs. We do not discriminate on the basis of legally protected characteristics. Agency Note: We do not accept resumes from agencies or search firms. Please do not forward candidate profiles through our careers page, email, LinkedIn messages, or directly to company employees. Any resumes submitted will be deemed the property of the company, and no fees will be paid in the event the candidate is hired.

## #LI-EW1

## About Delos Data Inc

## Company Overview
- **One-liner**: Delos Data builds a new interconnect architecture and server design purpose-built for AI inference, enabling faster, more scalable inference by eliminating network bottlenecks.
- **Entity Type**: Private (Stealth/Seed stage)
- **Headquarters**: Palo Alto, California, USA
- **Founded**: 2025
- **Founders**: Ed Doe (CEO & Co-Founder), Dan Daly (CTO & Co-Founder)

## Core Business
- **Primary Industry**: Semiconductor Manufacturing / AI Infrastructure
- **Target Customers**: Hyperscalers, AI infrastructure builders, and enterprises scaling AI inference workloads (B2B)
- **Mission/Purpose**: To deliver the world's most capable and responsive intelligence by building an interconnect purpose-built for AI inference, not borrowed from HPC, cloud, or training.

## Products & Services
- **Nonstop AI™**: A new cluster architecture and server design that accelerates AI inference through cabled scale-up. It reduces GPU idle time caused by data center interconnect bottlenecks and is designed to flexibly scale to thousands of GPUs, CPUs, and accelerators.
- **Delos Server**: Brings scale-up IO to the network fabric, enabling larger scale-up domains for inference.
- **Delos Mosaic™**: Software providing fine-grained visibility into the scale-up domain, allowing for real-time inference bottleneck detection and AI workload tuning.

## Market Standing
- **Valuation**: Not publicly disclosed (Private, early-stage company)
- **Key Metric**: Total funding not publicly disclosed; company is in early access deployment with select customers.
- **Notable Investors/Partners**: Not publicly disclosed; company exhibited at NVIDIA GTC 2026 (Booth 150) and will demonstrate at Computex 2026 (Booth J1328).
- **Growth Signals**: 
  - Founded in 2025, already has 3 employees with 25% monthly headcount growth.
  - 7 active job postings as of mid-2026.
  - Announced Nonstop AI™ architecture in May 2026 with early access deployments.
  - Exhibited at major industry events (NVIDIA GTC 2026, Computex 2026).
  - Website traffic growing 39.4% month-over-month.

## Competitive Advantages
- **Purpose-built for inference**: Unlike competitors who borrow interconnects from HPC, cloud, or training, Delos Data builds an interconnect specifically designed for AI inference workloads.
- **Cabled scale-up architecture**: Enables flexible scaling to thousands of GPUs, CPUs, and accelerators, reducing GPU idle time caused by network bottlenecks.
- **Full-stack approach**: Combines hardware (Delos Server), software (Delos Mosaic™), and silicon expertise to deliver a unified system-level solution.
- **Ecosystem compatibility**: Built to work within today's GPU and accelerator ecosystems, making adoption easier for hyperscalers and enterprises.
- **Founding team pedigree**: CTO Dan Daly and CEO Ed Doe bring deep expertise from leading semiconductor and AI companies.

## Strategic Focus
- **Product launch and market entry**: Currently in early access with select customers, with broader availability planned for Q4 2026.
- **Scaling the team**: Actively hiring across engineering (system software, DFT, verification, SDET), advanced packaging, and people operations roles.
- **Building the brand**: Establishing presence at major industry events (NVIDIA GTC, Computex) to build credibility and attract top talent.
- **Targeting hyperscalers and AI infrastructure builders**: The primary customer base for the Nonstop AI™ architecture.

## Why Work Here
- **Mission-driven work**: Opportunity to build foundational infrastructure for the next generation of AI, working on a problem the founders describe as "the next leap in AI performance."
- **Early-stage impact**: Join a company founded in 2025 with only 3 employees, offering significant ownership and influence over product and culture.
- **Hybrid/Remote flexibility**: Roles are listed as both remote and hybrid (Palo Alto, CA and Montréal, QC, CAN), with a "Remote Workspace" designation for many positions.
- **Founding team**: Work directly under experienced leadership (CTO Dan Daly, CEO Ed Doe) with deep expertise in semiconductors and AI.
- **Cutting-edge tech stack**: Work with Kubernetes, PyTorch, CUDA, SystemVerilog, Python, Terraform, and more across hardware and software domains.
- **High-growth trajectory**: 25% monthly headcount growth, active hiring across 7+ roles, and strong momentum from major industry events.

## Sources
1. [delosdata.com](https://delosdata.com/)
2. [builtin.com](https://builtin.com/company/delos-data)
3. [linkedin.com](https://www.linkedin.com/company/delosdata)
4. [delosdata.com/press](https://www.delosdata.com/press/faster-ai-inference-enabled-by-1000x-higher-scale-with-delos-data-nonstop-ai)
5. [opencorpdata.com](https://opencorpdata.com/us-va/11860584)

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