--- title: 'Program Management - Principal / Sr. Principal Technical Program Manager – IP, ASIC & Chiplet Platforms at Eliyan' canonical: 'https://feeny.ai/job/program-management-principal-sr-principal-technical-program-manager-ip-asic-29s06vbpaq89' type: 'job' last_seen: '2026-09-07' --- # Program Management - Principal / Sr. Principal Technical Program Manager – IP, ASIC & Chiplet Platforms at Eliyan - **Company:** Eliyan - **Location:** Bay Area - **Employment:** full-time - **Work type:** onsite - **Posted:** 2026-08-07 - **Last confirmed live:** 2026-09-07 - **Apply:** https://jobs.lever.co/eliyan/09099b9d-3f7b-434c-9b28-2dc5df4b6078 ## Job description ## ON-SITE (BAY AREA) Join the leading chiplet startup! As an Eliyan Principal Technical Program Manager, you will be working at a fast-paced early-stage startup creating technologies that fuel tomorrow’s chiplet based systems with best-in-class power, area, manufacturability, and design flexibility. You will be responsible for leading, planning, and help execute ASIC development and platform program. You will work with a cross-functional team of experts that operate from first principles, innovate and push the envelope to create high-volume and high-performance manufacturable products. We offer a fun work environment with excellent benefits. Key Responsibilities: - Program Leadership: Own end-to-end execution of IP, ASIC, and platform programs, from architecture and IP definition through design, verification, validation, silicon bring-up, and production readiness. - Plan of Record & Critical Path Management: Build and maintain an integrated program schedule spanning design, verification, DFT, physical design, packaging, and software; own the critical path and drive it to closure. - Cross-Functional Coordination: Partner daily with digital design, design verification, DFT, physical design, analog/mixed-signal design, packaging and substrate design, PCB and platform design, silicon bring-up, firmware, and software teams to keep every workstream aligned. - Technical Fluency: Get into the technical details of interconnect and chiplet architecture, packaging tradeoffs, and SoC-level integration — enough to ask sharp questions, unblock engineering decisions, and speak credibly with customers and partners. - Vendor and IP Management: Manage external IP vendors and OSAT/packaging partners, holding them accountable to committed timelines, specifications, and quality. - Customer Engagement: Serve as the primary program interface to customers, defining deliverables and ensuring seamless integration of Eliyan’s IP and silicon solutions into their products. - Schedule and Risk Management: Define milestones, maintain a live risk register, and proactively identify and mitigate the risks most likely to move the critical path. - Budget and Resource Allocation: Manage program budgets, allocate resources efficiently, and track spend against plan to optimize development efforts. - Technical Reviews and Decision-Making: Run regular program and technical reviews, surface tradeoffs, and drive decisions that optimize performance, cost, and schedule. - Executive Reporting and Metrics: Quantify program health with clear KPIs, and translate technical detail into concise, decision-ready updates for engineering leadership and executives. - Process, Documentation, and Reporting: Define and continuously improve program management practices and tooling as Eliyan scales, maintain clear documentation, and keep stakeholders informed with regular updates. Required Qualifications: - Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience. - 15+ years of semiconductor program management experience, including pre-silicon and post-silicon execution across at least two full IP or ASIC programs, from concept through production. - Proven ability to lead large-scale, complex, multi-disciplinary semiconductor programs from architecture through volume production. - Demonstrated ability to juggle multiple concurrent programs at once, making portfolio-level trade-offs — prioritizing resources, schedules, and scope across programs to maximize overall business impact. - Deep working knowledge of the full silicon development lifecycle — front-end and back-end design, DV, DFT, packaging, PCB/platform design, and silicon bring-up. - Experience managing external IP vendors and direct customer engagements around technical deliverables and integration. - Strong track record driving schedule, risk, and budget management across many concurrent, interdependent workstreams. - Excellent verbal and written communication skills, with the ability to tailor style, tone, and level of detail to any audience — from a deep technical exchange with individual engineers to a concise, decision-ready narrative for the CEO. - Ability to influence and drive alignment across engineering teams without direct authority, in a fast-moving startup environment. - Experience with program management tools (e.g., Jira, MS Project, Smartsheet, Confluence) and methodologies (Agile, Waterfall, or hybrid). Preferred Qualifications: - Direct experience with chiplet interconnect, UCIe, or die-to-die PHY programs, or with advanced packaging (2.5D/3D, CoWoS, InFO, or similar). - Background in networking ASICs, mixed-signal PHY SoCs, high-performance computing, or AI/ML accelerator silicon. - Working knowledge of firmware and software bring-up as it relates to silicon validation. - PMP, PgMP, or equivalent program management certification. What We Offer: - The chance to shape the program management function at a company defining a new segment of the semiconductor industry. - Direct, high-visibility partnership with Eliyan’s founding and technical leadership team. - Competitive salary, meaningful equity, and comprehensive health benefits. - A collaborative, first-principles engineering culture built around solving hard problems together. ## About Eliyan ## Company Overview - **One-liner**: Eliyan develops high-bandwidth, low-power chiplet interconnect technology (NuLink) that solves data bottlenecks in AI and data center chips. - **Entity Type**: Private (Series C-II) - **Headquarters**: Santa Clara, California, United States - **Founded**: 2021 - **Founders**: Ramin Farjadrad (CEO), Syrus Ziai (VP Engineering), Patrick Soheili (Chief Strategy & Business Officer) ## Core Business - Primary industry: Semiconductor Manufacturing (chiplet interconnect IP and PHY silicon) - Target customers: B2B – companies building custom AI chips (hyperscalers, chip designers, networking firms) - Mission: “Revolutionize chiplet connectivity technologies by challenging the status quo to unleash the ultimate performance of smart systems of the future.” ## Products & Services - **[NuLink™ D2D PHY](https://eliyan.com/about/)**: Die-to-die interconnect PHY supporting industry standards (BoW and UCIe) and proprietary simultaneous-bidirectional (SBD) technology. Delivers 4× the bandwidth and 2× the power efficiency of alternatives in advanced or standard packaging, with bump pitches from 40–130 microns. - **[NuLink™-XD](https://linkedin.com/company/eliyan-corporation)**: A new class of power-reach configurable 224G PAM4 SerDes for chip-to-chip and chip-to-module applications, targeting the lowest-power electro-optical modules for AI scale-up networks. Up to 40% lower power than competing solutions. ## Market Standing - **Valuation**: $1 billion (as of July 2026 Series C) - **Annual Revenue**: $3.5 million (2025); forecasts hundreds of millions by end of 2027 [reuters.com](https://www.cbinsights.com/company/eliyan) - **Total Funding**: $295 million (conflicting reports: other sources state $150M total); includes $145M Series C led by Seligman Ventures (July 2026), $60M Series B led by Samsung Catalyst Fund and Tiger Global (March 2024), $40M Series A led by Tracker Capital (Nov 2022). - **Notable Investors/Partners**: Seligman Ventures (board seat for Umesh Padval), Cisco Systems, Lumentum, Samsung Catalyst Fund, Tiger Global Management, Tracker Capital, VentureTech Alliance. - **Growth Signals**: Headcount of 73 employees with +6.7% monthly growth; 21 active job postings (quarterly trend +2,000%); expects to start chiplet shipments in 2026; expanding across 6 countries (US, Germany, Netherlands, Canada, India, Israel). ## Competitive Advantages - Breakthrough die-to-die interconnect architecture (invented by founder Ramin Farjadrad in 2016) that achieves 4× bandwidth and 2× power efficiency versus competing IP. - Works with standard packaging (wide range of bump pitches), reducing cost and complexity for chip designers. - Independent alternative to Broadcom/Marvell in the chiplet interconnect space, giving custom AI chip makers a neutral, high-performance option. ## Strategic Focus - Solving the growing data-movement bottleneck in AI compute (GPUs often idle 30–40% waiting for data). - Scaling NuLink and NuLink-XD platforms to support both chip-to-chip and chip-to-module applications for next-generation AI infrastructure. - Ramping chiplet production and licensing revenue, targeting hundreds of millions in sales by 2027. ## Why Work Here - On-site culture with offices in Santa Clara (HQ), Vancouver (BC), and other global locations; no remote/hybrid mentioned. - Engineering-heavy team (54% technical roles) with a fast-paced startup environment and deep expertise from companies like Marvell, Intel, AMD, and Synopsys. - Opportunity to work on cutting-edge semiconductor interconnect technology that directly impacts AI performance. - Active hiring across digital design, verification, DFT, physical design, optical engineering, and program management. ## Sources 1. [eliyan.com/about](https://eliyan.com/about/) 2. [jobs.lever.co/eliyan](https://jobs.lever.co/eliyan) 3. [linkedin.com/company/eliyan-corporation](https://linkedin.com/company/eliyan-corporation) 4. [cbinsights.com/company/eliyan](https://www.cbinsights.com/company/eliyan) 5. [reuters.com (via CNA)](https://www.cbinsights.com/company/eliyan) (Note: embedded Reuters article on CB Insights page) 6. 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