---
title: 'Rack-Scale AI Hardware Architect at Mythic'
canonical: 'https://feeny.ai/job/rack-scale-ai-hardware-architect-mythic-austin-n5z7b6sg114w'
type: 'job'
last_seen: '2026-10-19'
---

# Rack-Scale AI Hardware Architect at Mythic

- **Company:** Mythic
- **Location:** Austin, TX
- **Employment:** full-time
- **Work type:** hybrid
- **Posted:** 2026-09-22
- **Last confirmed live:** 2026-10-19
- **Apply:** https://jobs.lever.co/mythic-ai.com/f212c853-e660-4bc0-bd3c-1c1f2f289920

## Job description

Mythic builds AI compute platforms around large numbers of small, energy-efficient accelerators rather than a handful of very large ones. Serving frontier-scale models on that kind of architecture pushes the hardest engineering problems out of the die and into the rack: how many thousands of devices are packaged, connected, powered, and cooled in a very small volume. We are looking for a System Architect to own the rack-level reference design for these platforms. You will lead rack and platform pathfinding across board and chassis layout, scale-up and scale-out fabric topology, connector and cable plant, power delivery, and the cooling required at high rack densities. None of it can be settled apart from software: how a model is partitioned across devices sets the bandwidth required between layers, and the bandwidth the fabric can economically carry sets which partitionings are viable. The role sits at the intersection of electrical, mechanical, and software engineering, and the goal is an architecture quite different from today’s GPU racks that delivers a comparable result at rack level.

## What You’ll Own

- Rack-level reference architecture — board, chassis, backplane, rack topology, mechanical envelope, physical constraints, and serviceability — from pathfinding through a working reference implementation.
- Scale-up and scale-out interconnect: PCIe hierarchy and switching, high-speed Ethernet and SerDes, die-to-die and board-level links, copper versus optical at each tier, retimers, connectors and cable plant, topology, oversubscription, and the bandwidth and latency budget for each hop.
- Thermal architecture for high-density racks: direct-to-chip and cold-plate cooling versus immersion, CDUs and manifolds, flow and pressure budgets, component thermal limits, and the rack-to-facility interface.
- Power delivery architecture, including rack distribution and busbar design, high-voltage DC and 48V-class conversion and efficiency, transient behavior across very large device counts, redundancy, telemetry, and RAS.
- Joint modeling with the software team of the full LLM solution — partitioning strategy, inter-layer traffic, collectives — translated into fabric, memory, and topology requirements and backed by quantitative rack- and cluster-level models of performance, power, thermal, and cost.

## What We’re Looking For

- Minimum Bachelor’s degree in Electrical Engineering, Mechanical Engineering, Computer Engineering, or a related field, with relevant experience in server, datacenter, HPC, or AI system design.
- Demonstrated architecture and design ownership of dense, rack-based server systems taken to production, including authoring the specifications ODM and OEM partners build against.
- Expert command of state-of-the-art copper and optical interconnect: PCIe, high-speed Ethernet and SerDes, DAC and twinax, backplane and cabled channels, AOCs, and pluggable or co-packaged optics, with the signal-integrity judgment to know where each approach stops working.
- Expert command of removing heat from racks, cooling architecture, cold plates, manifolds, CDUs, flow and thermal budgeting, and the facility-side interface.
- Ability to reason across interconnect, power, thermal, mechanical, and software boundaries rather than within one, including working directly with software on model partitioning, with a track record of modeling and trade studies driving architectural decisions.

## Preferred Qualifications

- Master’s degree or PhD in Electrical Engineering, Mechanical Engineering, Computer Engineering, or a related field.
- Hyperscale or OCP experience, including ORv3 and contributions to relevant standards bodies.
- Experience with systems built from many small accelerators, dataflow, or wafer-scale architectures rather than only GPU-tray designs.
- Experience with LLM training or inference at scale and how parallelism strategies stress a fabric, plus familiarity with chiplets, die-to-die interfaces, and advanced packaging.
- Experience carrying a reference design through ODM or CM partners into production and into customer datacenters, including EMC, structural, and shock and vibration qualification.

What Success Looks Like

- A rack reference implementation exists, is buildable, and meets its performance, power, and thermal targets in hardware rather than in a spreadsheet.
- The partitioning and fabric story is coherent: software can map frontier-scale models across the system, and the interconnect carries the resulting traffic without being over-provisioned or starved.
- Thermal and power architectures are validated with measured data, hold headroom for the next device generation, and match a system model trusted for the next round of decisions.
- Customers and partners can deploy the design in real facilities against clearly documented power, cooling, weight, and service requirements.
- Hardware, mechanical, and software teams work from one architecture instead of three.

## Why This Role Matters

- Mythic's advantage is energy per operation at the device. Delivering that advantage at scale depends on the rack around it — how it powers, cools, and moves data between a very large number of devices.
- At this density the binding constraints are rack-level: fabric topology, connector and cable plant, power distribution, and thermal. Getting them right is what turns device-level efficiency into rack-level performance.
- Model partitioning and fabric design are the same decision viewed from two directions. This role is where that decision gets made.
- If you want to define what an AI rack looks like when it is not built around a handful of kilowatt-class GPUs, we should talk.

## Why Mythic

- Define the rack architecture for a fundamentally different approach to AI compute.
- Own foundational decisions with direct influence on silicon, packaging, systems, software, and product strategy.
- Work across the full stack, from model partitioning and interconnect down to busbars, cold plates, and connectors.
- Join a highly collaborative team solving difficult engineering problems across silicon, package, board, firmware, software, and systems.
- Have outsized technical impact in a senior individual-contributor role with broad organizational visibility.

Mythic is committed to building an inclusive team and encourages candidates from all backgrounds to apply.

## About Mythic

## Company Overview
- **One-liner**: Mythic is a semiconductor company developing analog compute-in-memory (CIM) processing units that deliver up to 100x greater energy efficiency for AI inference at the edge, in automotive, and in the data center.
- **Entity Type**: Private (Series C; total funding $290.4M as of 2021)
- **Headquarters**: Austin, Texas, United States (with offices in Silicon Valley, Vancouver, and Bangalore)
- **Founded**: 2012
- **Founders**: Mike Henry, Dave Fick, and Laura Fick (co‑founder and Chief Analog Compute Architect)

## Core Business
- **Primary industry**: Semiconductor manufacturing – AI hardware accelerators
- **Target customers**: B2B – OEMs and system integrators in automotive, defense, robotics, industrial IoT, and enterprise data centers
- **Mission statement**: “Enable a new era of AI performance and innovation by making it easier and more affordable to deploy powerful AI solutions, from the data center to the edge device.”

## Products & Services
- **Mythic APU (Analog Processing Unit)**: A chip built on analog compute-in-memory architecture that stores AI model weights inside flash memory and performs computation directly at the source, eliminating the energy wasted by moving data between processor and memory. Delivers up to 100x system‑level performance‑per‑watt‑per‑dollar vs. conventional digital/GPU inference. Available today for edge and enterprise deployments.
- **Mythic Software Platform**: A unified hardware/software stack that simplifies deploying AI models on the APU, including compilers, runtimes, and model optimization tools.

## Market Standing
- **Valuation / Market Cap**: Not disclosed (private company)
- **Key Metric**: $14.1M annual revenue (2026 estimate); $290.4M total funding raised across 8 rounds, including a $70M Series C in 2021 led by Hewlett Packard Enterprise and BlackRock, with earlier rounds led by SBVA (SoftBank) and Valor Equity Partners.
- **Notable Investors / Partners**: BlackRock, Hewlett Packard Enterprise, Valor Equity Partners, SBVA (SoftBank). The team includes veterans from NVIDIA, ON Semiconductor, and Luminar.
- **Growth Signals**: 
  - Headcount grew 46.4% YoY (to ~42 employees as of 2026).
  - Acquired Videantis (Jan 2026), a German AI processor company whose silicon is already running in 30 million production vehicles, giving Mythic an instant automotive ADAS footprint.
  - Active job postings for 18 open roles across hardware, software, and corporate functions.
  - Expanding into India with a VP of Mythic India and a Bangalore office.

## Competitive Advantages
- **Analog Compute-in-Memory**: Eliminates the Von Neumann bottleneck by computing in analog directly where data is stored, achieving up to 100x better energy efficiency than traditional digital or GPU inference.
- **Automotive‑Grade from Day One**: The Videantis acquisition provides proven, scalable ADAS/AD platforms already deployed in millions of vehicles, with customers like Bosch, Continental, and Valeo.
- **Proven Silicon**: Mythic’s APU is operational and available today, not theoretical.
- **Deep Talent Pool**: Team includes experts from NVIDIA, ON Semiconductor, Cisco, and leading chip companies, with a strong mix of analog, digital, and AI expertise.

## Strategic Focus
- **Scale the Automotive Business**: Leverage the Videantis acquisition to become a major player in automotive ADAS and autonomous driving compute.
- **Expand into Defense and Industrial**: Target high‑reliability, low‑power AI applications in defense, robotics, and industrial IoT.
- **Data Center Edge**: Deliver efficient inference for enterprise AI workloads that cannot afford the power cost of traditional GPUs.
- **Grow Global Team**: Build out software, hardware, and field engineering teams, particularly in India and the U.S.

## Why Work Here
- **Impactful Mission**: Work at the frontier of AI hardware, solving the fundamental energy efficiency problem in AI compute.
- **Collaborative, Results‑Focused Culture**: Mythic describes itself as a “collaborative, results‑focused team where everyone has a chance to contribute and lead.”
- **Rapid Growth**: 46% YoY headcount growth and a recently acquired company signal strong momentum and career growth opportunities.
- **Diverse Technical Challenges**: Roles span chip design, compiler engineering, AI algorithms, firmware, and systems engineering.
- **Hybrid/Office Policy**: Some roles are listed as hybrid (e.g., Palo Alto, Austin) or fully on‑site; exact policy varies by position. The company has offices in Austin, Silicon Valley, and Vancouver, with a growing presence in Bangalore.
- **Notable Perks**: Not explicitly stated, but working at a well‑funded, pre‑IPO startup in the AI hardware space typically offers equity, competitive compensation, and the chance to shape the future of computing.

## Sources
1. [Mythic Official Website](https://www.mythic.ai/)
2. [Mythic Careers Page (Lever)](https://jobs.lever.co/mythic-ai.com)
3. [Mythic Team Page](https://www.mythic.ai/company)
4. [Mythic LinkedIn Company Profile](https://www.linkedin.com/company/mythic-ai)
5. [Mythic Join Us Page](https://mythic.ai/join-us/)

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