---
title: 'Senior ASIC Design Verification Engineer at K2 Space'
canonical: 'https://feeny.ai/job/senior-asic-design-verification-engineer-k2-space-seattle-dp4ksrn1m7z4'
type: 'job'
last_seen: '2026-09-06'
---

# Senior ASIC Design Verification Engineer at K2 Space 

- **Company:** K2 Space 
- **Location:** Seattle, WA
- **Posted:** 2026-06-30
- **Last confirmed live:** 2026-09-06
- **Apply:** https://job-boards.greenhouse.io/k2spacecorporation/jobs/5287990008

## Job description

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by over $1 billion in total funding from leading investors including Altimeter Capital, ICONIQ, Kleiner Perkins, Lightspeed Venture Partners, Redpoint Ventures, and T. Rowe Price — and with over $1 billion in signed contracts across commercial and US government customers, we're mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space.

The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today's and tomorrow's massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits.

With multiple launches in 2027 and plans to scale to 100 satellites a year, we're Building Bigger — helping develop the solar system and build toward a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a high-growth Series D-funded company, we'd love for you to apply.

## The Role

We are seeking a Senior ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define the verification approach, contribute to methodology, and work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers. This is a hands-on role with high ownership, deep technical engagement, and the opportunity to shape first-generation silicon.

## Responsibilities

- Develop and execute verification plans for block-level, subsystem-level, and full-chip environments. Build SystemVerilog/UVM test benches, including agents, monitors, scoreboards, checkers, and coverage models.
- Write SystemVerilog Assertions (SVA) and integrate formal verification where appropriate.
- Drive constrained-random and directed testing strategies to validate functionality, corner cases, and stress scenarios.
- Run simulations, triage failures, drive root-cause analysis, and collaborate with RTL designers to resolve issues.
- Implement and maintain functional coverage, code coverage, assertion coverage, and ensure coverage closure for sign-off.
- Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and fast debug iterations.
- Participate in design reviews, microarchitecture discussions, and influence design-for-verification (DFV) best practices.
- Work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers to ensure end-to-end coverage and test.
- Support silicon bring-up and post-silicon validation through test reuse, diagnostics, and debug analysis.
- Participate in ASIC team interviews.
- Contribute to advancement of DV methodologies and improvements.
- Engage external IP providers and verification partners when needed.

## Qualifications

- B.S. or M.S. in Electrical Engineering, Computer Engineering, or related field.
- 5+ years of experience in ASIC/SoC verification.
- Solid understanding of SystemVerilog, digital logic, RTL design, and hardware verification flows.
- Proficiency with a simulation (VCS, Xcelium, Questa), waveform debug (Verdi, SimVision), coverage tool, and scripting languages (ex: Python, Perl, TCL).
- Experience with testplanning, UVM-based testbench development, constrained-random testing, functional coverage, and SystemVerilog assertions.
- Experience with regression management, coverage analysis, revision control (Git), and CI/CD automation.
- Understanding of several industry-standard interfaces (ex: APB/AHB/AXI).
- Familiarity with embedded processor-based designs and firmware/bare metal coding (ex: C, C++).

## Nice to Have

- Experience with developing and integrating reference models.
- Understanding of low power verification.
- Familiarity with gate-level simulation and analog behavioral models.
- Involvement in post-silicon validation planning and execution.
- Experience working in cross-functional, geographically distributed teams.
- Experience in space, telecom, or RF/digital mixed systems is a plus.

Compensation and Benefits:

- Base salary range for this role is $170,000 – $250,000 + equity in the company
- Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level
- Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks

If you don’t meet 100% of the preferred skills and experience, we encourage you to still apply! Building a spacecraft unlike any other requires a team unlike any other and non-traditional career twists and turns are encouraged!

If you need a reasonable accommodation as part of your application for employment or interviews with us, please let us know.

Export Compliance

As defined in the ITAR, “U.S. Persons” include U.S. citizens, lawful permanent residents (i.e., Green Card holders), and certain protected individuals (e.g., refugees/asylees, American Samoans). Please consult with a knowledgeable advisor if you are unsure whether you are a “U.S. Person.”

The person hired for this role will have access to information and items controlled by U.S. export control regulations, including the export control regulations outlined in the International Traffic in Arms Regulation (ITAR). The person hired for this role must therefore either be a “U.S. person” as defined by [22 C.F.R. § 120.15](https://www.law.cornell.edu/cfr/text/22/120.15) or otherwise eligible for a federally issued export control license.

## Equal Opportunity

K2 Space is an Equal Opportunity Employer; employment with K2 Space is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

## About K2 Space 

## Company Overview
- **One-liner**: K2 Space builds the largest, highest-power satellite platforms on orbit, enabling previously impossible missions across LEO, MEO, GEO, and cislunar space.
- **Entity Type**: Private (Series C, $440.53M total raised)
- **Headquarters**: Torrance, California, United States (Los Angeles area)
- **Founded**: 2022
- **Founders**: Neel Kunjur (Co-Founder, CTO) and Karan Kunjur (Co-Founder, CEO) – both SpaceX veterans

## Core Business
- **Primary industry**: Aerospace & Defense – satellite manufacturing and space platforms
- **Target customers**: Government/military (DoD, Space Force), commercial satellite operators (e.g., SES), and mission integrators requiring high-power, large-format spacecraft
- **Mission statement**: "Build bigger" – scale changes what’s possible; bigger satellites deliver more power, mass on orbit, and resilience at lower cost.

## Products & Services
- **Mega Class Satellite Platform**: A high-power (20 kW), high-mass (3,000 kg payload) satellite bus designed for mass production and vertical integration. Suitable for LEO, MEO, GEO, and cislunar missions. Built in-house with radiation-tolerant architectures, redundant avionics, and high-Δv propulsion.
- **Launch Stacking**: By stacking 10 Mega Class satellites per launch vehicle, K2 maximizes power to orbit (200 kW per launch), drastically reducing per-satellite launch costs.
- **End-to-End Mission Services**: Design, build, integrate, and operate custom satellite missions for defense, communications, and sensing applications.

## Market Standing
- **Valuation**: Not publicly disclosed
- **Key Metric**: Total funding raised – $440.53M (Series C of $250M raised ~6 months ago, per CB Insights)
- **Notable Investors**: Alpine Space Ventures, Altimeter Capital, Lightspeed, T. Rowe Price, Redpoint Ventures, and 20+ others
- **Notable Partners/Contracts**: $30M military contract for a “Mega” satellite mission; partnership with SES to develop next-generation MEO network
- **Growth Signals**: Headcount grew 106% YoY to 186 employees; active job postings up 391% YoY (172 open roles); plans for a three-orbit demonstration mission; Pentagon’s former space policy chief joined as Head of Strategy

## Competitive Advantages
- **Size & Power Advantage**: Mega Class platform delivers 10x the power (20 kW vs. 2 kW) and significantly more mass than typical constellation satellites, enabling higher-performance payloads.
- **Vertical Integration**: 80% of each satellite built in-house – drives reliability, accelerates production, and enables rapid iteration.
- **Resilient Design**: Radiation-tolerant architectures, redundant avionics, and high-Δv propulsion allow operation in the harshest orbits (GEO, MEO, LEO, cislunar).
- **Cost Efficiency**: Stacking 10 satellites per launch vehicle dramatically lowers per-unit launch cost, making large satellites economically viable.

## Strategic Focus
- **Scale Production**: Series C funding directed toward scaling manufacturing capacity and building out the Torrance factory.
- **Three-Orbit Demonstration**: Planning a mission to demonstrate capabilities across LEO, MEO, and GEO – a key milestone for customer validation.
- **Defense & Commercial Expansion**: Pursuing military contracts (DoD, Space Force) and commercial partnerships (SES) to anchor long-term revenue.
- **Talent Acquisition**: Aggressively hiring across avionics, mechanical, GNC, production, and program management roles to support rapid growth.

## Why Work Here
- **Culture**: "First principles thinking" and a bias toward building big, ambitious hardware. The team includes many SpaceX, Anduril, and NASA JPL alumni.
- **Work Environment**: Fast-paced startup with a focus on vertical integration and hands-on engineering. Office in Torrance, CA (Los Angeles area). Some roles (e.g., GNC) are remote-eligible.
- **Growth Opportunity**: 106% headcount growth in the past year, 172+ open positions – strong career advancement potential.
- **Perks & Mission**: Work on the largest satellites in the industry, directly impacting national security and next-generation space infrastructure. "Make previously impossible missions possible."
- **Notable**: Active job postings include roles in avionics, mechanical engineering, production, RF payload, dynamics, and program management (TS/SCI clearance may be required for some roles).

## Sources
1. [K2 Space Official Website](https://www.k2space.com/)
2. [K2 Space Careers Page (Greenhouse)](https://job-boards.greenhouse.io/k2spacecorporation)
3. [LinkedIn – K2 Space Corporation](https://www.linkedin.com/company/k2-space)
4. [CB Insights – K2 Space Profile](https://www.cbinsights.com/company/k2-space)
5. [Bloomberg Technology – K2 Space Raises $110M Series B](https://www.bloomberg.com/news/articles/2025-07-07/k2-space-raises-110-million-to-scale-up-satellite-production) (referenced in search results)
6. [SES Partners with K2 Space – News Article](https://www.k2space.com/news) (referenced in search results)

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