---
title: 'Senior Digital Engineer at Morse Micro'
canonical: 'https://feeny.ai/job/senior-digital-engineer-morse-micro-sydney-k8bvkatrr38k'
type: 'job'
last_seen: '2026-09-12'
---

# Senior Digital Engineer at Morse Micro

- **Company:** Morse Micro
- **Location:** Sydney, Australia
- **Employment:** full-time
- **Work type:** onsite
- **Posted:** 2026-05-19
- **Last confirmed live:** 2026-09-12
- **Apply:** https://jobs.ashbyhq.com/morse-micro/e1afdf8c-26d6-40f5-bc50-7ed24839f001/application

**Skills:** SystemVerilog, Chisel, Verilog, Digital Design, RTL Design, Synthesis Flows, ECO Implementation, Digital Verification, C Programming, CDC/RDC Analysis, Python, Tcl, Shell, Makefiles, AI Coding Assistants, Design Automation, Low-Power Design Techniques, Clock Gating, Power Domains, Embedded Systems

> The Senior Digital Engineer will design and verify next-generation Wi-Fi chips for IoT applications, focusing on systemVerilog and Chisel RTL. Responsibilities include driving verification strategies, managing digital design infrastructure, and mentoring junior team members within a high-growth semiconductor environ...

## Job description

Morse Micro is at the forefront of next-generation Wi-Fi technology, delivering breakthrough solutions that redefine wireless connectivity. Our innovative products are designed to meet the demands of the rapidly evolving market, providing superior performance and reliability. Do you want to play a key role in building next generation Wi-Fi chips that will truly enable the Internet of Things (IoT)? Keen to make a real difference in a VC-backed high-growth company while working in a dynamic & fun environment? Then join Morse Micro, Australia’s largest fabless semiconductor company!

We welcome applications from overseas candidates, with relocation and visa support available for the successful applicant. Your responsibilities would include:

- Deliver SystemVerilog and Chisel RTL across chip, subsystem, and block levels, meeting PPA targets.
- Own microarchitecture and design specifications for chip-, subsystem-, and block-level digital logic.
- Drive verification strategy and test plan closure (RTL sims, GLS, X-prop, CDC/RDC, lint, FPGA emulation) through our phase-gate methodology.
- Derive product, subsystem, and block-level feature and performance requirements by studying competitor parts, tracking state of the art in low-power wireless/IoT SoCs, and translating market direction into technical specifications.
- Enhance and maintain our digital design and verification infrastructure.
- Architect clocking, reset, and power domains; author and close UPF/CPF power intent through to GLS and PA simulation.
- Apply low-power techniques (clock gating, power gating, retention, isolation) appropriate to battery- and energy-harvesting IoT applications.
- Integrate mixed-signal IP (ADPLL, PHY, pads, analog macros) and own the digital/analog interface contract.
- Partner with firmware and PHY/MAC teams on register interfaces, programming models, interrupts, and boot sequences to enable efficient HW/SW co-design.
- Take on chip-lead duties: drive system verification, synthesis QoR, P&R support, gate-level netlist and power-aware sims, ECO and LEC closure, and tapeout checklist completion.
- Coordinate across analog, layout, PnR, DFT, and SW teams to hit major project milestones.
- Use AI coding assistants and agents fluently across RTL, verification, scripting, and documentation tasks, with sound judgement on where they accelerate work and where they need close review.
- Identify opportunities to apply AI to our design and verification flows — spec analysis, test generation, debug, code review, infrastructure automation — and drive their adoption across the team.
- Deliver large, complex projects on schedule with multiple concurrent spins.
- Mentor junior team members and uphold design quality through reviews, coding standards, and methodology improvements.

Essential skills (you must have):

- Bsc/MSc/Phd in Electrical / Electronics / Communication Engineering or Computer Science
- 5+ years experience as a Senior Digital Engineer
- Proven experience in the development of complex digital blocks, subsystems, or SoC architectures
- Strong understanding of digital design fundamentals, RTL design methodologies, synthesis flows, and ECO implementation/debug
- Solid expertise in Verilog/SystemVerilog, digital verification methodologies, C programming, and CDC/RDC analysis
- Proficiency in scripting and automation using Python, Tcl, Shell, Makefiles, or similar languages/tools
- Experience with design automation and infrastructure development is highly desirable.
- Knowledge of low-power design techniques, including clock gating, power domains, power gating, retention, and isolation, is a plus
- Familiarity with embedded systems, bus or processor architectures is an advantage
- Excellent verbal and written communication skills
- Proven to work constructively within your team and among other groups
- Strong analytical and problem-solving skills
- A determination to deliver even when subject to time pressures
- A hands-on, practical attitude

What we offer:

- Competitive salary + excellent stock option package
- Performance Bonus opportunity
- Income protection Insurance
- Healthy work environment with sit/stand desks and large screens
- Lots of snacks & drinks, including barista coffee, Friday team lunches & some of the world’s best beers
- Flexible working hours
- Work from home policy
- Community & social groups and much more
- Join a high performing, inclusive company where you can make a real impact

Who we are: Morse Micro is Australia’s largest semiconductor company building Wi-Fi HaLow (802.11ah) chips for the Internet of Things (IoT). We are a team of wireless experts that love to work hard, innovate & invent. Together, we are building the world’s lowest power Wi-Fi technology that will enable billions of IoT devices to connect securely to the internet. We are a global team with offices in Sydney, Picton & Melbourne (Australia), Irvine & San Jose (USA), Bangalore (India), Cambridge (UK), Hangzhou & Shenzen (China), Taipei (Taiwan) and Tokyo (Japan).

## About Morse Micro

## Company Overview
- **One-liner**: Morse Micro is reinventing Wi-Fi for the Internet of Things by developing the world’s smallest, fastest, longest-range and lowest-power Wi-Fi HaLow chips.
- **Entity Type**: Private (Series B, raised ~A$170M / ~US$200M; valuation ~US$700M as of Feb 2023)
- **Headquarters**: Surry Hills, Sydney, Australia (also offices in Irvine & Portola Valley, CA; Cambridge, UK; Hangzhou, China; Taipei, Taiwan; Bangalore, India)
- **Founded**: 2016
- **Founders**: Michael de Nil (CEO) and Andrew Terry (CTO)

## Core Business
- **Industry**: Wi-Fi HaLow semiconductors for the Internet of Things (IoT)
- **Target Customers**: B2B – OEMs, system integrators, and design houses serving Commercial, Residential, and Industrial IoT markets (access control, security cameras, industrial automation, retail, mobile devices)
- **Mission/Purpose**: To become the #1 wireless IoT chip company in the world by building a new generation of wireless chips that reach farther, are lower power, and truly secure.

## Products & Services
- **MM8108 Wi-Fi HaLow SoC**: The industry’s smallest and most integrated single-chip solution, operating in the sub-1 GHz band for superior penetration and extended range. Features a new USB host interface for simplified integration.
- **HaLowLink 1 Evaluation Kit**: A development board available on Mouser.com for $99, with FCC/IC/RCM certifications for the U.S., Canada, and Australia, enabling rapid prototyping.
- **Design Partner Program**: A global initiative to accelerate commercialization of production-ready Wi-Fi HaLow solutions through collaboration with vetted design houses and system integrators.

## Market Standing
- **Valuation**: ~US$700 million (A$1 billion) as of February 2023 (conflicting reports may cite different dates; this is the most recent available).
- **Key Metric**: Total funding of ~A$170M (Series B led by MegaChips, with participation from TelstraSuper, HESTA, Hostplus, NGS/Blackbird, UniSuper/Uniseed, and Australian Government seed funding).
- **Notable Investors/Partners**: MegaChips (lead investor), Blackbird Ventures, Uniseed, TelstraSuper, HESTA, Hostplus; board members include Ray Stata (Analog Devices co-founder) and Mike Nicholls.
- **Growth Signals**: 
  - 180 employees globally (late 2023), with plans to grow significantly and open more overseas offices.
  - Over 2 million chips produced by November 2023 from Singapore facility.
  - Won IoT Product of the Year in 2022 and 2023.
  - Expanded into Japan via MegaChips; established operations centre in Taiwan (2024).
  - Maintains dual supply chains (China and Taiwan) for geopolitical resilience.

## Competitive Advantages
- **Technology Moats**: 
  - Claims 10x range, 100x area, and 1,000x volume over traditional Wi-Fi.
  - Chip is one-fifth the size of a traditional Wi-Fi processor, runs for years on a coin-cell battery.
  - Single access point can securely connect up to 8,191 devices.
  - Team includes original inventors of Wi-Fi and designers of billions of shipped Wi-Fi chips.
- **Standards Leadership**: Morse Micro’s executive staff includes the Vice-Chair of the Wi-Fi HaLow Task Group, ensuring interoperability and influence over the standard.
- **First-Mover Advantage**: Best-funded Wi-Fi HaLow company; first to commercialize record-breaking SoC.

## Strategic Focus
- **Commercialization**: Ramping production and go-to-market through the Design Partner Program and distribution (Mouser).
- **Geographic Expansion**: Deepening presence in Japan, China, Taiwan, and India; opening new offices.
- **Application Verticals**: Prioritizing security cameras, smart home, smart city, industrial automation, and AMI 2.0 (advanced metering infrastructure).
- **Supply Chain Resilience**: Dual-sourcing chips and components from China and Taiwan, with assembly/warehousing in Singapore.

## Why Work Here
- **Culture**: “Relaxed, friendly work environment” with honest & transparent culture; values include perseverance, initiative, and delivering excellence.
- **Work Model**: Newly fitted-out offices with sit/stand desks, large screens, and stocked drinks fridge, snack bar, and barista coffee.
- **Perks**: Competitive salary, excellent stock option/benefit package, potential visa sponsorship and relocation support for the right candidates.
- **Engineering Focus**: Work alongside “the best engineers in the world” – many are Wi-Fi pioneers. The company is growing and actively hiring across hardware, software, and systems roles.

## Sources
1. [morsemicro.com](https://www.morsemicro.com/) – Company overview and product details
2. [morsemicro.com/careers](https://www.morsemicro.com/careers/) – Career benefits and culture
3. [morsemicro.com/company](https://www.morsemicro.com/company/) – Team, offices, investors
4. [morsemicro.com/vision-mission-values](https://www.morsemicro.com/vision-mission-values/) – Vision, mission, values
5. [en.wikipedia.org](https://en.wikipedia.org/wiki/Morse_Micro) – Funding, history, valuation, headcount

## Other roles at Morse Micro

- [Senior Firmware Engineer](https://feeny.ai/job/senior-firmware-engineer-morse-micro-surry-hills-ezhajkhdn62g) — Surry Hills, Australia
- [Principal Product Manager](https://feeny.ai/job/principal-product-manager-morse-micro-san-jose-bmm13zjhwkpg) — San Jose, CA
- [Director of Sales, China](https://feeny.ai/job/director-of-sales-china-morse-micro-shenzhen-4c7hwt3j9hy0) — Shenzhen, China
- [Supply Chain & Logistics Specialist](https://feeny.ai/job/supply-chain-logistics-specialist-morse-micro-taipei-y0qgpnvgg4y4) — Taipei, Taiwan
- [DevOps Engineer](https://feeny.ai/job/devops-engineer-morse-micro-sydney-m9vatackpttr) — Sydney, Australia
- [Product Quality Engineer](https://feeny.ai/job/product-quality-engineer-morse-micro-irvine-p00rhwzfn43k) — Irvine, CA
- [Senior DFT Engineer](https://feeny.ai/job/senior-dft-engineer-morse-micro-sydney-je4b8f9e4kh1) — Sydney, Australia
- [Senior RF Calibration & Lab Technician](https://feeny.ai/job/senior-rf-calibration-lab-technician-morse-micro-surry-hills-f0mgc2kve6w6) — Surry Hills, Australia
- [Senior Frontend PHY IC Design Engineer (DSP focus)](https://feeny.ai/job/senior-frontend-phy-ic-design-engineer-dsp-focus-morse-micro-surry-hills-3gr0m8tmgztb) — Surry Hills, Australia