--- title: 'Senior Director, Corporate Development at Astera Labs' canonical: 'https://feeny.ai/job/senior-director-corporate-development-astera-labs-san-jose-california-t4a3xg3cjaaw' type: 'job' last_seen: '2026-09-11' --- # Senior Director, Corporate Development at Astera Labs - **Company:** Astera Labs - **Location:** San Jose California, United States - **Posted:** 2026-07-02 - **Last confirmed live:** 2026-09-11 - **Apply:** https://job-boards.greenhouse.io/asteralabs/jobs/4711918005 ## Job description Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at [www.asteralabs.com](http://www.asteralabs.com/). ## Role Overview Astera Labs is seeking a Senior Director of Corporate Development to lead strategic transactions — including acquisitions, investments, and partnerships — that will shape the future of AI connectivity. Reporting to the Head of Corporate Development, you will partner with engineering, product, and executive leadership to identify, evaluate, and execute opportunities that align with our long-term growth strategy. This is a high-visibility opportunity to join a hyper-growth semiconductor company at the epicenter of rack-scale AI infrastructure. Your work will directly influence executive and board-level decisions and help scale the purpose-built connectivity backbone powering the next generation of AI data centers. ## Key Responsibilities - Strategic Transaction Leadership - Lead corporate development transactions end-to-end, from target identification through close and integration - Partner with executive and engineering leaders to evaluate opportunities, address strategic gaps, and drive build/buy/partner analyses - Own deal project management across the full lifecycle, ensuring timely execution and stakeholder alignment - Financial & Strategic Analysis - Conduct detailed valuation, pro forma modeling, and investment assessments to evaluate deal alignment - Develop executive and board-ready presentation materials with clear recommendations - Research adjacent and new market opportunities, including opportunity sizing, target landscaping, and competitive analysis - Cross-Functional Collaboration & Integration - Drive diligence workstreams across engineering, product, finance, legal, and operations to validate key assumptions and value drivers - Oversee post-merger integration to ensure deals deliver long-term strategic and financial value - Continually refine the company's framework and playbook for acquiring new capabilities and partnerships - Market Intelligence - Build deep expertise in emerging AI infrastructure technologies, companies, and business models - Monitor industry trends and competitive dynamics to inform corporate development strategy and executive decision-making ## Basic Qualifications - Bachelor's degree in Business Administration, Electrical Engineering, Computer Science, or related field - 12+ years of overall professional experience across corporate development, investment banking, private equity, venture capital, or related roles, with 5–8 years in a leadership or management capacity - Semiconductor corporate development experience, or investment banking experience covering the semiconductor sector - Demonstrated track record leading strategic transactions and engaging directly with executive leadership - Strong analytical skills with expertise in valuation, financial modeling, and strategic analysis - Excellent communication and presentation skills, with the ability to convey complex concepts clearly to diverse audiences ## Preferred Qualifications - MBA or advanced degree - Direct M&A experience in the semiconductor or data center infrastructure space - Experience with post-merger integration planning and execution - Familiarity with AI/ML infrastructure trends and the evolving data center connectivity landscape - Willingness to travel as needed for deals, industry events, and conferences Base salary range is $220,000 to $280,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives and benefits. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities. ## About Astera Labs ## Company Overview - **One-liner**: Astera Labs designs and delivers semiconductor-based connectivity solutions purpose-built to unleash the full potential of cloud and AI infrastructure. - **Entity Type**: Public (Nasdaq: ALAB) - **Headquarters**: Santa Clara, California, United States - **Founded**: 2017 - **Founders**: Jitendra Mohan, Sanjay Gajendra, Casey Morrison ## Core Business - **Primary industry**: Semiconductor manufacturing / AI infrastructure connectivity - **Target customers**: B2B, primarily hyperscale cloud providers and system OEMs (e.g., NVIDIA, AMD, Intel) - **Mission statement**: To innovate, design, and deliver semiconductor-based connectivity solutions that are purpose-built to unleash the full potential of cloud and AI infrastructure. ## Products & Services - **Aries PCIe®/CXL™ Smart DSP Retimers**: Silicon ICs, boards, and modules that digitally recover degraded high-speed signals to extend reach and enable higher PCIe/CXL data bandwidth between compute, storage, and network controllers. - **Taurus Ethernet Smart Cable Modules™**: Hardware modules that increase network connectivity bandwidth between servers and switches over copper media, removing rack-level Ethernet bottlenecks. - **Leo CXL Memory Connectivity Controllers**: ICs and boards that expand, share, and pool DRAM memory to overcome processor memory bandwidth bottlenecks for AI workloads. - **Scorpio Smart Fabric Switches**: A family of PCIe 6 fabric switches ranging from 32 to 320 lanes, including the new 320-lane Scorpio X-Series Fabric Switch for AI scale-up fabrics. - **COSMOS Software Suite**: A connectivity system management and optimization software that enables configuration, monitoring, troubleshooting, and predictive analytics for all Astera Labs products. ## Market Standing - **Market Cap**: ~$11.6 billion (as of mid-2026) - **Key Metric - Revenue**: $35 million (annual, reported) - **Key Metric - Operating Income**: $173.4 million (2025) - **Key Metric - Net Income**: $219.1 million (2025) - **Total Funding**: ~$810.75 million (pre-IPO), with Series C ($50M, led by Fidelity) and Series D ($150M, led by Fidelity) - **IPO Date**: March 20, 2024 - **Notable Investors/Partners**: Fidelity, NVIDIA, Advanced Micro Devices, Intel, major hyperscalers - **Growth Signals**: 92% YoY headcount growth (675 employees); 144 active job postings (+260% YoY); expanded Taiwan operations with a new Cloud-Scale Interop Lab in 2026; shipping millions of devices across all major hyperscalers; 300+ design wins. ## Competitive Advantages - **First-to-market innovation**: Pioneered first-to-market PCIe, Ethernet, and CXL connectivity products. - **Patented software-defined platform approach**: Differentiates via a platform that combines silicon hardware with embedded COSMOS software, enabling flexibility, observability, and predictive analytics. - **Deep hyperscaler relationships**: Trusted partner to the world’s largest cloud providers, with proven interoperability validated in their own Cloud-Scale Interop Lab. - **Broad product portfolio**: Covers PCIe retimers, Ethernet cable modules, CXL memory controllers, and fabric switches—addressing the full spectrum of AI connectivity bottlenecks. - **Strong IP and engineering talent**: 443 employees in technical roles; talent sourced from Intel (65), Marvell (37), Texas Instruments (40), AMD (22), and NVIDIA. ## Strategic Focus - **Scaling AI infrastructure**: Expanding product portfolio and global footprint (12 countries) to meet surging demand for rack-scale AI. - **Open standards leadership**: All products are grounded in open standards (PCIe, CXL, Ethernet), ensuring interoperability and broad adoption. - **Taiwan expansion**: Growing engineering presence and Interop Lab in Taiwan to strengthen integration with leading AI platform providers and system manufacturers. - **Continued innovation**: Shipping the new 320-lane Scorpio X-Series Fabric Switch and expanding the COSMOS software suite for fleet-level management and optimization. ## Why Work Here - **Culture**: Described as collaborative, ownership-driven, and focused on solving complex problems together. The company emphasizes diversity and inclusion as drivers of creativity and innovation. - **Growth**: Astera Labs supports non-linear career growth—employees can deepen expertise (“scale up”) or broaden into new areas (“scale out”). 92% YoY headcount growth signals rapid expansion and opportunity. - **Remote/Hybrid**: Not explicitly stated, but global operations across 12 countries (including India, Canada, Israel, Taiwan, Vietnam) suggest a flexible, distributed work model. - **Benefits**: Competitive medical, dental, and vision plans; flexible time off; family planning and parental leave; 401K and retirement plans. - **Engineering culture**: Strong focus on cutting-edge semiconductor and AI infrastructure technology. High concentration of senior (24%) and specialist (19%) talent. Active internship and new graduate programs. - **Employee ratings**: 4.5/5.0 on LinkedIn (124 reviews), with high marks for compensation (4.6), culture (4.4), and career development (4.4). ## Sources 1. [Astera Labs Careers Page](https://www.asteralabs.com/careers/) 2. [Astera Labs Official Website](https://www.asteralabs.com/) 3. [Astera Labs LinkedIn](https://www.linkedin.com/company/astera-labs) 4. [Astera Labs Products Page](https://www.asteralabs.com/products/) 5. [Astera Labs S-1 Filing (SEC)](https://ir.asteralabs.com/static-files/7103a4cb-aa6b-4f11-a4b0-f179cd4c5bee) ## Other roles at Astera Labs - [Senior STA Engineer](https://feeny.ai/job/senior-sta-engineer-astera-labs-ahmedabad-gujarat-c3v8grbhy8wn) — Ahmedabad Gujarat, India - [Tech Lead, Physical Design](https://feeny.ai/job/tech-lead-physical-design-astera-labs-bengaluru-qf292d2t7tcg) — Bengaluru, India - [Senior Digital Design Engineer](https://feeny.ai/job/senior-digital-design-engineer-astera-labs-toronto-msea5r66yqk1) — Toronto, Canada - [Process Engineer Cleaning & Coating /Day Shift](https://feeny.ai/job/process-engineer-cleaning-coating-day-shift-astera-labs-aachen-north-rhine-gtbmag20fcd1) — Aachen North Rhine-Westphalia, Germany - [Test Engineer](https://feeny.ai/job/test-engineer-astera-labs-aachen-north-rhine-westphalia-9h3jrr7zeyxv) — Aachen North Rhine-Westphalia, Germany - [Lead Logic Design for UALink IP/Subsystem Engineer](https://feeny.ai/job/lead-logic-design-for-ualink-ip-subsystem-engineer-astera-labs-bengaluru-e1yyte8016v3) — Bengaluru, India - [Principal Emulation Engineer](https://feeny.ai/job/principal-emulation-engineer-astera-labs-san-jose-california-z7sj80tsjm8y) — San Jose California, United States - [Principal Package Signal & Power Integrity](https://feeny.ai/job/principal-package-signal-power-integrity-astera-labs-san-jose-california-23vv9bk9kh0d) — San Jose California, United States - [Senior Principal Automation Engineer](https://feeny.ai/job/senior-principal-automation-engineer-astera-labs-san-jose-california-9nrgfjvqqyqm) — San Jose California, United States - [Tech Lead Automation Engineer](https://feeny.ai/job/tech-lead-automation-engineer-astera-labs-san-jose-california-13cx0vpz7q9z) — San Jose California, United States