--- title: 'Senior Director, Physical Design & Backend Engineering (HPC) at Hop' canonical: 'https://feeny.ai/job/senior-director-physical-design-backend-engineering-hpc-hop-austin-7cchhvz44ep3' type: 'job' last_seen: '2026-09-09' --- # Senior Director, Physical Design & Backend Engineering (HPC) at Hop - **Company:** Hop - **Location:** Austin, TX - **Employment:** full-time - **Work type:** onsite - **Posted:** 2026-07-01 - **Last confirmed live:** 2026-09-09 - **Apply:** https://jobs.lever.co/hophr/bce4d619-cc33-4712-aa87-d115135d54e1 ## Job description The Senior Director, Physical Design & Backend Engineering is accountable for end-to-end backend execution across HPC SoC and MCU programs, including implementation, signoff, and convergence from RTL to GDS. This role leads globally distributed engineering teams and ensures delivery of high-quality silicon on schedule, meeting defined power, performance, and area (PPA) targets. The role operates at the intersection of execution, technology enablement, and organizational leadership, driving consistency, scalability, and reliability across multiple sites and concurrent programs. ## What you'll do 1. End-to-End Backend Execution - Own full lifecycle delivery from RTL through physical implementation, signoff, and tape-out. - Ensure predictable execution, design closure, and milestone adherence across all programs. - Drive first-pass silicon success through robust methodologies and execution discipline. 1. Global Team Leadership - Lead and scale large, geographically distributed backend engineering teams. - Establish clear accountability, performance standards, and delivery ownership across sites. - Build organizational capability to support multiple concurrent SoC and MCU programs. 1. PPA and Quality Accountability - Own delivery against defined power, performance, and area (PPA) targets. - Drive continuous improvement in cost, quality, and engineering efficiency. - Ensure adherence to quality standards, signoff criteria, and validation requirements. 1. Technology and Methodology Enablement - Enable adoption of advanced process nodes and associated design methodologies. - Drive improvements in tools, flows, and engineering practices across implementation and signoff. - Partner with foundries, EDA vendors, and internal teams to enhance design outcomes. 1. Cross-Functional Collaboration - Partner with architecture, RTL, DFT, methodology, and product engineering teams. - Ensure alignment between architectural intent and physical implementation feasibility. - Support program execution through close collaboration with program and product leadership. 1. Organizational Execution and Scaling - Standardize ways of working across global teams to reduce variability and improve predictability. - Drive data-driven execution using metrics, KPIs, and performance tracking. - Identify and remove bottlenecks impacting delivery timelines or quality. Scope and Impact - Responsible for backend execution across multiple SoC and MCU programs. - Direct leadership of large, multi-site engineering teams. - Critical impact on silicon delivery timelines, product quality, and business outcomes. - Key contributor to organizational execution capability and scalability within HPC. ## What we require Education - Master’s degree in Electrical Engineering, Computer Engineering, or related field. ## Experience - Approximately 20+ years of experience in semiconductor design, with strong focus on physical design and implementation. - Proven experience leading large-scale, global engineering teams. - Demonstrated track record of delivering complex SoC programs across multiple technology nodes. Technical Expertise - End-to-end RTL-to-GDSII flow, including synthesis, place and route, timing closure, and physical verification. - Advanced node implementation and signoff methodologies. - Deep understanding of SoC and MCU design and integration. Leadership Capabilities - Ability to lead large, globally distributed teams in a matrixed environment. - Strong execution focus with accountability for delivery outcomes. - Effective cross-functional collaboration and stakeholder management. - Data-driven decision-making and structured problem-solving. ## Preferred Qualifications - Experience in high-performance computing, automotive, or advanced SoC domains. - Exposure to methodology and flow development at scale. - Experience working across multiple geographies and cultures. ## Key Success Measures - On-time delivery of silicon across programs. - Achievement of PPA and quality targets. - Improvement in execution predictability and cycle time. - Organizational scalability and capability development. ## About Hop ## Company Overview - **One-liner**: Hop (HopHR) is a recruitment platform that connects U.S. companies with pre-vetted AI, machine learning, and data science talent from Latin America. - **Entity Type**: Private (Bootstrapped) - **Headquarters**: Walnut Creek, California, United States - **Founded**: 2016 - **Founders**: Nazli Nadem and Arash Sohrabian ## Core Business - **Primary industry/industries**: Staffing and Recruiting (specialized in AI/ML and data science talent) - **Target customers**: B2B – startups to Fortune 500 companies seeking technical talent, especially in AI, machine learning, and data engineering - **Mission or purpose statement**: “Break geographic barriers, giving global talent access to high-paying, future-focused roles” and promote diversity in tech hiring. ## Products & Services - **Recruitment Platform**: AI-driven matching and vetting platform that evaluates candidates using proprietary technology; only top 1 in 500 talents are selected. - **Direct Hire**: Full-time placement of pre-vetted engineers (AI/ML, data science, full-stack, MLOps, etc.) with a 16-day selection process. - **Contract-to-Hire**: Trial period engagements before committing to a full-time offer. - **Team Augmentation**: On-demand scaling of engineering capacity with LATAM-based talent working in U.S. time zones. ## Market Standing - **Valuation/Market Cap**: Not disclosed - **Key Metric**: Headcount of 16 employees (+12.5% YoY); talent pool of over 100,000 data science and AI professionals worldwide (including 35,000+ women in tech) - **Notable Investors/Partners**: No disclosed investors; trusted by startups and Fortune 500 companies; featured in Forbes. - **Growth Signals**: 80% client return rate; LinkedIn followers growing +10.5% yearly; expanding marketing team (hiring Marketing Manager as of Sep 2024). ## Competitive Advantages - **LATAM Focus**: Timezone-aligned talent (mostly Latin America) enabling real-time collaboration at lower cost compared to U.S.-based hires. - **Rigorous Vetting**: Proprietary 16-day evaluation covering technical skills, communication, and cultural fit; only top 1 in 500 candidates pass. - **Diversity Commitment**: Actively promotes hiring of women and underrepresented groups in tech; over 35,000 women in their talent pool. - **AI-Powered Matching**: Uses machine learning algorithms and a human-segmented database to surface the best candidates quickly. ## Strategic Focus - **Geographic Expansion**: Continue breaking barriers by connecting LATAM talent with U.S. companies, with a goal to uplift communities. - **AI Talent Specialization**: Deepening expertise in generative AI, LLMs, and MLOps to meet growing demand. - **Scalability**: Offering flexible engagement models (direct hire, contract-to-hire, augmentation) to adapt to client needs. ## Why Work Here - **Culture**: Rated 4.2/5.0 on employer reviews (Culture: 4.3, Career: 4.3, Compensation: 3.8). Described as “zestful,” encouraging bold initiatives and diversity. - **Work Mode**: Hybrid workspace – employees engage in a combination of remote and on-site work. - **Notable Perks**: Focus on professional growth; access to top mentors and training on ethics, work culture, and self-mastery. - **Engineering Culture**: Emphasis on using AI tools to enhance recruitment, with a tech-forward approach and a small, distributed team (16 people across 6 countries). ## Sources 1. [LinkedIn – Hop](https://linkedin.com/company/hophr) 2. [HopHR About Page](https://hophr.com/about) 3. [HopHR Services Page](https://hophr.com/services) 4. [Built In – HopHR Careers](https://builtin.com/company/hophr) 5. [HopHR Jobs on Lever](https://jobs.lever.co/hophr) ## Other roles at Hop - [Lead Product Manager](https://feeny.ai/job/lead-product-manager-hop-new-york-bz4zr7m451bn) — New York, NY - [HPC Sr Staff Engineer, Test Jig Core Technology Development](https://feeny.ai/job/hpc-sr-staff-engineer-test-jig-core-technology-development-hop-japan-8g8f6mx40sbb) — Japan - [HPC SoC Timing Design Engineer/Leader](https://feeny.ai/job/hpc-soc-timing-design-engineer-leader-hop-japan-fzxfhke4zj5h) — Japan - [Principal Engineer, Application Engineering (f/m/d)](https://feeny.ai/job/principal-engineer-application-engineering-f-m-d-hop-munich-7ahbxvmj1bw3) — Munich, Germany - [Automotive MCU Chip Architect](https://feeny.ai/job/automotive-mcu-chip-architect-hop-duesseldorf-je6nftbh4adz) — Duesseldorf, Germany - [Staff/Sr Staff, Automotive MCU Product Marketing (HPC)](https://feeny.ai/job/staff-sr-staff-automotive-mcu-product-marketing-hpc-hop-duesseldorf-3k7jewzd4mra) — Duesseldorf, Germany - [Automotive MCU Business Development Marketing Director/Sr. Manager](https://feeny.ai/job/automotive-mcu-business-development-marketing-director-sr-manager-hop-japan-70k9899m8nps) — Japan - [Chief of Staff to SVP](https://feeny.ai/job/chief-of-staff-to-svp-hop-remote-zbm1kq7zfzwa) - [Full Stack Software Engineer](https://feeny.ai/job/full-stack-software-engineer-hop-los-angeles-s6n3xjwpfyq4) — Los Angeles, CA - [Full Stack Software Engineer](https://feeny.ai/job/full-stack-software-engineer-hop-los-angeles-dsat1b74gxyj) — Los Angeles, CA