---
title: 'Senior DSL Engineer at Lemurian Labs'
canonical: 'https://feeny.ai/job/senior-dsl-engineer-lemurian-labs-santa-clara-california-united-states-toronto-aa87rvqkddce'
type: 'job'
last_seen: '2026-09-15'
---

# Senior DSL Engineer at Lemurian Labs

- **Company:** Lemurian Labs
- **Location:** Santa Clara California United States Toronto Ontario Canada, United States
- **Work type:** remote
- **Posted:** 2026-04-14
- **Last confirmed live:** 2026-09-15
- **Apply:** https://job-boards.greenhouse.io/lemurianlabs/jobs/4200595009

## Job description

## About Us

At Lemurian Labs, we're reimagining the foundations of computing to make AI accessible to everyone. Our mission is to remove the limits of scale, hardware, and cost that hold back innovation, so the people solving humanity's hardest problems can move faster.

We're building a new kind of software stack: a hardware-agnostic platform that makes every system — from a laptop to a supercomputer — feel like one seamless engine. Developers can write once, run anywhere, and get state-of-the-art performance across any chip, any cloud, at any scale. It's a complete rethink of how software and hardware interact — designed for the era beyond Moore's Law.

We're not looking for the comfortable or the conventional; we're looking for the bold. The engineers who crave frontier problems, who want to bend the limits of what's possible, who see infrastructure not as a constraint but as a canvas. If you want to build the foundation for the next era of AI and change what humanity can achieve in the process, join us.

## About the Role

We are building a domain-specific language and compiler toolchain for programming machine learning models.

As a Senior DSL Compiler Engineer, you will focus on the compiler frontend: scanning, parsing, AST design and construction, compiler passes, type and shape inference, and error and warning reporting. You should be deeply comfortable reasoning about object ownership and lifecycle management in C++, and be prepared to work within a custom ARC system with semantics similar to the standard smart pointer types.

## What You'll Do

- Design and implement compiler frontend components including the lexer, parser, abstract syntax tree, and compiler passes.
- Design and implement type inference and shape inference systems for the DSL.
- Design clear, actionable error and warning diagnostics that help users understand and resolve problems in their programs.
- Work within and extend a proprietary automatic reference counting system that governs memory management across the frontend.
- Participate in code reviews to maintain code quality and ensure sound design decisions.
- Collaborate through pair programming sessions.
- Contribute to the full software engineering lifecycle: product specification, requirements gathering, high-level design, low-level design, implementation, and testing.
- Help inform the design of future DSLs as the platform expands to other scientific computing domains.

## Requirements

Essential Skills and Experience

- BS degree in Computer Science, Computer Engineering, or equivalent practical experience
- Extensive experience designing and implementing domain-specific languages.
- Deep expertise in compiler frontend engineering: lexical analysis, parsing, AST design, semantic analysis, and compiler passes.
- Strong experience with type inference and shape inference systems.
- Strong professional C++ background with modern C++ standards.
- Deep understanding of automatic reference counting concepts and object lifetime management in C++, including thorough familiarity with the semantics of shared_ptr, weak_ptr, and unique_ptr. The frontend uses a proprietary ARC implementation with similar semantics, and you must be comfortable reasoning about ownership, reference cycles, and clean teardown in this kind of system.
- Experience designing compiler diagnostics (errors and warnings) that are clear and useful to end users.
- Experience across the full software engineering lifecycle: product specification, requirements gathering, high-level design, low-level design, implementation, and testing.
- General familiarity with GPUs or other accelerator devices and their role in high-performance computing and machine learning workloads.

## Preferred Skills and Experience

- Master's or PhD in Computer Science, Computer Engineering, or equivalent
- Experience with or willingness to use AI-assisted code generation tools in day-to-day development.
- Familiarity with PyTorch or similar machine learning frameworks.
- Experience with Python language internals or strategies for subsetting Python-like languages.

## Why Join Lemurian Labs

- Own a critical layer of our compiler stack where optimization decisions have direct, measurable impact on model performance
- Work on the hardest graph-level problems in AI infrastructure — across diverse hardware targets and model architectures
- Collaborate with a team that treats infrastructure as a canvas and optimization as a craft
- Competitive compensation including equity, medical/dental/vision, retirement savings, and wellness benefits

Lemurian Labs is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees, regardless of gender identity, race, ethnicity, sexual orientation, disability status, age, or background.

Compensation depends on experience and geographic location and will be narrowed during the interview process. Additional benefits include equity, company bonus opportunities, medical, dental, and vision coverage, a retirement savings plan, and supplemental wellness benefits.

## About Lemurian Labs

## Company Overview
- **One-liner**: Lemurian Labs builds a hardware-agnostic AI software stack (Tachyon) that enables organizations to write AI workloads once and deploy them across any hardware—CPUs, GPUs, accelerators—with performance matching hand-tuned kernels, eliminating vendor lock-in and kernel rewrites.
- **Entity Type**: Private (Startup)
- **Headquarters**: Santa Clara, California, United States (with offices in Canada and India)
- **Founded**: 2021
- **Founders**: Jay Dawani (CEO & Co-Founder), Dr. Vassil Dimitrov (Chief Scientist & Co-Founder)

## Core Business
- **Primary industry**: AI Infrastructure / Software
- **Target customers**: B2B, Enterprise (AI teams at cloud providers, hardware vendors, and large-scale AI model developers)
- **Mission or purpose statement**: "We're building the hardware-agnostic software infrastructure that makes AI accessible to everyone—fast, affordable, and scalable. Not just better tools. The foundation for what comes next."

## Products & Services
- **Tachyon**: A complete software stack comprising five components:
  - **Tachyon DSL**: A Pythonic tensor language for expressing end-to-end AI pipelines.
  - **Hardware-Independent Concurrent IR**: Represents computation using parallel programming primitives that explicitly capture concurrency and data flow.
  - **Hardware-Parameterized Graph Optimizer**: Restructures computation to maximize data reuse, minimize data movement, and eliminate synchronization barriers based on detailed hardware characteristics.
  - **Portable Optimizing Code Generator**: Generates high-performance object code for any target hardware (NVIDIA, AMD, Intel, etc.) using hardware characteristics as parameters.
  - **Hierarchical Dynamic Runtime**: Explicitly manages data movement and orchestrates execution across clusters, adapting dynamically to changing runtime conditions.
- **Type**: Software (SaaS/Platform)

## Market Standing
- **Valuation/Market Cap**: Not publicly disclosed
- **Key Metric**: Total Funding of **$15.1M** across 6 rounds; Annual Revenue estimated at **$2.3M** (per LinkedIn data)
- **Notable Investors/Partners**: Oval Park Capital (led Seed Round), Silicon Catalyst (Non-Equity Assistance), ventureLAB (Non-Equity Assistance); team alumni from Sun Microsystems, Intel, NVIDIA, IBM, Huawei, Qualcomm, AMD, Uber, Google
- **Growth Signals**:
  - Headcount: 34 employees (+11.1% YoY)
  - LinkedIn followers: 5,181 (+113.2% yearly growth)
  - Active job postings: 8 (+166.7% yearly growth)
  - Beta testing for Tachyon opens Summer 2027
  - Claims 60-80% reduction in serving costs from higher utilization

## Competitive Advantages
- **Hardware-Agnostic Performance**: Tachyon matches or exceeds hand-tuned kernel performance on any hardware without vendor lock-in—a direct solution to the fragmentation and cost problems plaguing AI infrastructure.
- **Accelerated Software Paradigm**: The company positions itself as leading a shift from "accelerated hardware" to "accelerated software," targeting the post-Moore's Law era.
- **Deep Technical Expertise**: Founders and team have decades of experience at top chip and systems companies (NVIDIA, Intel, AMD, Google, Uber, etc.), giving them unique insight into the weaknesses of current approaches.
- **Portability Without Compromise**: Claims to enable moving between clouds and hardware in hours, not months, and to support new accelerators in <90 days via a plug-in model.

## Strategic Focus
- **Current Priorities**: Completing Tachyon development and launching beta testing in Summer 2027; scaling the engineering team (especially compiler engineers, ML performance engineers, and runtime engineers); building developer community and product-market fit.
- **Direction for Growth**: Becoming the standard software layer for AI deployment across all hardware, enabling companies to focus on AI innovation rather than infrastructure battles.

## Why Work Here
- **Culture Highlights**: Values include "Relentless execution," "Fail fast, learn faster," "Extreme ownership," "Radical candor," and "Be a force multiplier." The team emphasizes moving quickly, testing aggressively, and iterating relentlessly.
- **Remote/Hybrid/Office Policy**: Has 4 offices across 2 countries (Santa Clara HQ, Menlo Park, Santa Clara, and Oakville, Canada); LinkedIn data suggests presence in US (55%), Canada (28%), and India (2%). Likely hybrid or flexible given distributed team.
- **Notable Perks/Engineering Culture**: Employer rating of **4.7/5.0** (3 reviews) with Work-Life: 5.0, Compensation: 4.0, Culture: 4.7, Career: 4.7. The company is building a groundbreaking software stack from the ground up—ideal for engineers passionate about compilers, systems programming, and AI infrastructure. Team composition is 50% technical roles. Notable talent sources include Intel, Huawei Canada, Luminous Computing, and Untether AI.
- **Mission-Driven**: Explicitly focused on enabling AI to solve humanity's hardest problems (climate change, healthcare, education, scientific breakthroughs) by removing infrastructure barriers.

## Sources
1. [Lemurian Labs Website](https://www.lemurianlabs.com/)
2. [Lemurian Labs About Page](https://www.lemurianlabs.com/about)
3. [Lemurian Labs Technology Page](https://www.lemurianlabs.com/technology)
4. [Lemurian Labs Careers Page](https://job-boards.greenhouse.io/lemurianlabs)
5. [Lemurian Labs LinkedIn](https://www.linkedin.com/company/lemurianlabs)

## Other roles at Lemurian Labs

- [Senior Developer Tools Engineer](https://feeny.ai/job/senior-developer-tools-engineer-lemurian-labs-santa-clara-ww9gbhb1h1c9) — Santa Clara, CA / Toronto, Canada
- [Runtime Engineer](https://feeny.ai/job/runtime-engineer-lemurian-labs-santa-clara-rhjmgrt5gf44) — Santa Clara, CA / Toronto, Canada
- [Compiler Optimization Engineer](https://feeny.ai/job/compiler-optimization-engineer-lemurian-labs-santa-clara-1gzxed062b0j) — Santa Clara, CA / Toronto, Canada
- [Front End Compiler](https://feeny.ai/job/front-end-compiler-lemurian-labs-santa-clara-6b4bkrr13m3f) — Santa Clara, CA / Toronto, Canada
- [Compiler Code Gen Engineer](https://feeny.ai/job/compiler-code-gen-engineer-lemurian-labs-santa-clara-st5wp0zdt0mk) — Santa Clara, CA / Toronto, Canada