--- title: 'Senior Packaging Engineer at Arago' canonical: 'https://feeny.ai/job/senior-packaging-engineer-arago-paris-gyz0vbtqbswm' type: 'job' last_seen: '2026-11-09' --- # Senior Packaging Engineer at Arago - **Company:** Arago - **Location:** Paris, France - **Employment:** full-time - **Work type:** onsite - **Posted:** 2026-11-04 - **Last confirmed live:** 2026-11-09 - **Apply:** https://jobs.ashbyhq.com/arago/a6dd0384-bda2-4bcb-b60b-b0b78c29bbfd/application **Skills:** Heterogeneous integration, Packaging processes, Wafer dicing, High-density Cu pillars, Advanced bumping, Flip-chip, Redistribution layer, Encapsulation, Die attach and bonding, Wirebonding, 2.5D/3D integration, Photonic packaging, Optoelectronic packaging, Micro-scale optical alignment, Thermal simulation, Mechanical simulation, EM simulation, Cadence Allegro Package Designer, Altium, Cadence Virtuoso > Lead IC packaging initiatives from design to manufacturing, managing supply chains and NPI phases. Collaborate with cross-functional teams to ensure high-yield production and oversee failure analysis for semiconductor and photonic devices. ## Job description Meet Arago and the Aragonians Arago is an AI and computer hardware company whose mission is to drive the course of history forward. We do so by accelerating breakthroughs at the intersection of AI and semiconductors. Founded in 2024 by AI researchers and physicists with deep expertise in photonics, electronics, software, mathematics, and machine learning, Arago brings together a lean team of engineers and scientists from the world’s top companies and research labs. Composed of nine nationalities and operating from hubs in France, North America, and Israel, we believe in great science and fast achievements. Our work is guided by these core principles: - Do great things: we deliver work we’re proud to sign our name to. - High velocity: speed matters. We move quickly, one step at a time. - One unit: we’re all in this together, with relationships grounded in trust, respect, and camaraderie. Arago is backed by executives from Apple, Arm, Nvidia, Microsoft, and Hugging Face, as well as prominent US and European deeptech venture firms and exited founders. ## What you’ll do As a Senior Packaging Engineer, you will lead IC packaging initiatives from conceptualization and design to manufacturing process selection. You will establish the necessary supply chain, manage sub-contractors, and oversee the NPI and ramp-up phases for current and future Arago devices. Required Skills and Experience - Master's degree in Electrical Engineering or Integrated Circuits Design. - 5+ years of experience in the semiconductor and photonic packaging industry. - Proficiency in heterogeneous integration and packaging processes, including wafer dicing (stealth, blade, diamond scribing), high-density Cu pillars and advanced bumping, flip-chip, redistribution layer and encapsulation (thermal lid, compression molding, glob-top), die attach and bonding techniques (epoxy, attach film, reflow, thermocompression, eutectic, laser-assisted bonding, Cu-Cu direct bonding), wirebonding, and 2.5D/3D integration schemes (back grinding, TSV reveal, die stacking, interposer). - Strong expertise in photonic and optoelectronic packaging and micro-scale optical alignment, including passive and active alignment of lenses and optical fibers, fine die placement (precision < 1µm), and experience with InP, GaAs, and other non-Si semiconductors. - Proficiency in thermal, mechanical, and EM simulations. - Strong understanding of packaging industrialization, production flows, high-yield and scale manufacturing, failure analysis, and Six Sigma methodology is a plus. - Language: English at a proficient level. French is a plus. ## Responsibilities - Design packaging solutions spanning from initial drawings and simulations to DFM. - Identify, vet, and manage external sub-contractors. - Collaborate cross-functionally with IC design, optical, and PCB teams to align packaging specifications across domains. - Lead the chip industrialization process, ensuring high yield and Cpk. - Conduct thorough failure analysis and debugging. Pay and benefits - Competitive cash compensation, with final package based on location, experience, and the pay of team members in similar positions. - Meaningful stock option plan offered at the earliest stage of the company (included in the majority of full time offers). - Relocation bonus and coverage of moving expenses for relocation within 20 minutes of the company’s location. - Healthcare coverage (including family-friendly options), pension contributions, professional development support, and 25 days of PTO, in addition to public holidays. - Ownership of a key technical domain, with significant vertical and/or horizontal growth opportunities, based on performance and individual drive. - Reimbursement of 50% of the public transport subscription fee. - A high-paced, multicultural (with 10 nationalities), and engineering-led environment. ## About Arago ## Company Overview - **One-liner**: Arago builds photonic AI accelerator chips that use lasers instead of transistors to dramatically cut energy consumption while remaining compatible with existing AI software and hardware ecosystems. - **Entity Type**: Private (Seed stage) - **Headquarters**: Paris, France - **Founded**: 2024 - **Founders**: Nicolas Muller (CEO), Eliott Sarrey (CTO), Ambroise Müller (CSO) ## Core Business - **Primary industry/industries**: Semiconductor hardware, photonic computing, artificial intelligence infrastructure - **Target customers**: AI model developers, cloud data centers, enterprises deploying large-scale AI workloads (B2B, infrastructure) - **Mission or purpose**: To overcome the compute and memory ceilings of traditional silicon by leveraging light as a computing principle, delivering 10×–30× reductions in energy consumption for AI workloads. ## Products & Services - **JEF (codenamed)**: A photonic AI accelerator chip that processes data using photons instead of electrons. It integrates with standard software frameworks (PyTorch, etc.) through the CARLOTA® software stack, abstracts hardware details, and achieves multi-PetaOp/s performance with significantly lower energy and cost per operation. Designed for high-volume AI tasks with n³ complexity. ## Market Standing - **Valuation/Market Cap**: Not disclosed (private company) - **Key Metric**: Total funding of **$26.0M** (Seed round closed August 2025) - **Notable Investors/Partners**: Co-led by **Protagonist**, **Earlybird Venture Capital**, and **Visionaries Tomorrow**, with participation from **Generative IQ**, **C4 Ventures**, and angels including **Bertrand Serlet** (former VP at Apple), **Christophe Frey** (GM at Arm), **Olivier Pomel** (co-founder of Datadog), **Thomas Wolf** (co-founder of Hugging Face), and **Jack Abraham** (co-founder of Exowatt). - **Growth Signals**: Headcount grew **95.2% year-over-year** to 35 employees (+20 people). operates in 7 countries (France, US, UK, Norway, Israel, Spain, Bulgaria). Technical staff makes up 59% of the team. Actively hiring 16+ roles across hardware, software, and people operations. ## Competitive Advantages - **Photonic compute core**: Uses light instead of electrons, generating far less heat and enabling 10×–30× lower energy consumption per inference/training task. - **Full ecosystem compatibility**: The chip is designed to work with existing manufacturing processes, standard AI frameworks (PyTorch), and GPU-like programming models—avoiding the “cold start” problem that plagues most alternative processors. - **Deterministic architecture**: Achieves high memory-transfer efficiency for pointwise operations (n² complexity) while accelerating tensor-heavy workloads (n³ complexity) at ultra-low power. - **Backed by deep-tech veterans**: Investors and advisors from Apple, Arm, Nvidia, Microsoft, Hugging Face give credibility and access to semiconductor industry expertise. ## Strategic Focus - Accelerate product development and commercialisation of the “JEF” processor. - Grow the team across development sites in Paris, Tel Aviv, and other hubs. - Deepen business partnerships with AI infrastructure providers and foundries. - Maintain full software-layer abstraction (CARLOTA®) to ensure seamless adoption by existing AI workflows. ## Why Work Here - **Culture**: Arago describes itself as a team of “AI engineers and physicists who believe in great science and fast achievements” and seeks “bold jack-of-all-trades who love to ship products quickly” ([arago.inc](https://www.arago.inc/)). - **Work model**: Roles vary by location and function – some positions are on-site (Paris, Tel Aviv), others offer remote or hybrid arrangements (e.g., Head of People – Remote; Software Engineer – Drivers & Virtualization – Remote or Hybrid; Digital IC Backend Design Engineer – On-site) ([Built In](https://builtin.com/company/arago-inc/jobs)). - **Growth trajectory**: A fast-scaling startup (95% YoY headcount increase) with a mission to redefine AI hardware – ideal for engineers and scientists who want to work on cutting-edge photonics, hardware design, and AI software. - **Team composition**: Highly technical, with 59% of staff in engineering and science roles, and alumni from top research labs and companies like AMD, Mobileye, and EssilorLuxottica. ## Sources 1. [arago.inc](https://www.arago.inc/) 2. [LinkedIn – Arago Inc](https://www.linkedin.com/company/aragoinc) 3. [Tech.eu – Arago raises $26M](https://tech.eu/2025/07/08/arago-raises-26m-to-slash-ai-energy-consumption-with-breakthrough-photonic-chip/) 4. [Built In – Arago Inc Jobs](https://builtin.com/company/arago-inc/jobs) 5. [Ashby – Arago Careers](https://jobs.ashbyhq.com/arago) ## Other roles at Arago - [Mixed-signal IC Design Engineer](https://feeny.ai/job/mixed-signal-ic-design-engineer-arago-paris-rr1jk8q288v5) — Paris, France - [Senior Hardware Design Engineer](https://feeny.ai/job/senior-hardware-design-engineer-arago-paris-3qaxnnypq9g3) — Paris, France - [Senior Analog IC Design Engineer](https://feeny.ai/job/senior-analog-ic-design-engineer-arago-paris-g5kawehgwa00) — Paris, France - [Technical Sourcer](https://feeny.ai/job/technical-sourcer-arago-paris-bmehzpmmtzff) — Paris, France - [Mixed-signal Verification Engineer](https://feeny.ai/job/mixed-signal-verification-engineer-arago-paris-27w2w62mgcwz) — Paris, France - [Architecture Modeling Engineer](https://feeny.ai/job/architecture-modeling-engineer-arago-paris-fapf8vvzb1ph) — Paris, France - [SW Team Lead](https://feeny.ai/job/sw-team-lead-arago-paris-rrksrjj9qh9t) — Paris, France - [Software Engineer — Computation Kernels and Performance](https://feeny.ai/job/software-engineer-computation-kernels-and-performance-arago-paris-swx0mfz1tyz1) — Paris, France - [ML Systems Engineer — Inference Acceleration](https://feeny.ai/job/ml-systems-engineer-inference-acceleration-arago-paris-hv83wjsxczfd) — Paris, France - [Senior ASIC Architect](https://feeny.ai/job/senior-asic-architect-arago-paris-qm3pyhfqb1cx) — Paris, France