---
title: 'Senior/Staff Digital Design Engineer at OLIX'
canonical: 'https://feeny.ai/job/senior-staff-digital-design-engineer-olix-austin-t069bqmd7xhx'
type: 'job'
last_seen: '2026-10-18'
---

# Senior/Staff Digital Design Engineer at OLIX

- **Company:** OLIX
- **Location:** Austin, TX
- **Compensation:** $194k
- **Employment:** full-time
- **Work type:** onsite
- **Posted:** 2026-05-11
- **Last confirmed live:** 2026-10-18
- **Apply:** https://jobs.ashbyhq.com/olix/a952e790-50ba-4afe-8dab-438a76b2ddc2/application

**Skills:** CMOS digital design, ASIC design, FPGA prototyping, Xilinx, AMD, Intel, SystemVerilog, Verilog, VHDL, RTL synthesis, CDC/RDC, STA, Power-intent (UPF/CPF), Gate-level simulation, MATLAB, Simulink, Python, NumPy, Digital signal processing, Computer architecture

> The Senior/Staff Digital Design Engineer takes end-to-end ownership of high-speed, real-time data-processing silicon, from algorithm modeling to verified RTL and silicon bring-up. This role involves architecting high-throughput digital pipelines in advanced CMOS nodes, prototyping in FPGAs, and collaborating with mu...

## Job description

## About OLIX

AI is growing faster than any technology in history and the explosion in demand has created a massive infrastructure gap; we can no longer build chips or power stations fast enough to keep up. The industry is still leaning on a ten-year-old hardware blueprint that has reached its limit. A new paradigm that is faster and more efficient will be the biggest economic opportunity of the next century and create the most important company of the next decade. The OLIX Decode Accelerator 1 (DX-1) is the first accelerator architected specifically for decode. Rack-scale co-design of logic, data movement, packaging, optics and interconnect enables a step change in system level performance.

## The Role

We are seeking highly skilled and motivated Senior/Staff Digital Design Engineers with a strong focus on CMOS digital design to take end-to-end ownership of high-speed, real-time data-processing silicon, from early algorithm modelling to verified RTL and silicon bring-up. You will join a multidisciplinary group creating next-generation hardware where digital, optical and mixed-signal domains intersect. The ideal candidate will have a strong background in electrical engineering and semiconductor physics, along with a passion for developing reliable, high-performance digital circuits that drive breakthrough AI hardware.

## Responsibilities

- Architect, design and implement high‑throughput digital pipelines (multi‑GSPS input rate, continuous streaming data paths, deep pipelining and hand‑shaking) in advanced CMOS nodes
- Prototype and iterate rapidly in FPGA (Xilinx/AMD, Intel, or equivalent): bring‑up real‑time demos, exercise high‑speed transceivers, and feed learnings back into the ASIC
- Model algorithms and validate concepts in MATLAB/Simulink (or equivalent), ensuring functional equivalence through to gate‑level sign‑off
- Own RTL development (SystemVerilog / Verilog / VHDL) including synthesis, static‑timing closure, formal and constrained‑random verification
- Analyse power, performance and area (PPA); implement innovative techniques to achieve aggressive bandwidth‑per‑watt targets
- Collaborate with optical‑hardware, mixed‑signal and software teams to optimise data‑converter interfaces, clock‑domain crossings and firmware abstractions
- Mentor junior engineers, lead design reviews and champion best‑practice design methodologies

## Skills & Experience

- 7+ years of hands‑on digital design for high‑performance ASICs or SoCs, including ownership of at least one product that processes a continuous real‑time data stream
- Proven success closing timing on multi‑hundred‑MHz to multi‑GHz clock domains and integrating high‑speed IP (e.g., SerDes, HBM/DDR, PCIe, 100 GbE or similar)
- Expertise with industry‑standard EDA flows: RTL synthesis, CDC/RDC, STA, power‑intent (UPF/CPF), lint, and gate‑level simulation
- Demonstrated FPGA prototyping skills: constraint management, transceiver tuning, and hardware debug in the lab
- Proficiency using MATLAB/Simulink or Python/NumPy for algorithm modelling, fixed‑point analysis and test‑vector generation
- Solid grounding in digital signal‑processing concepts, computer‑architecture fundamentals and semiconductor device physics
- Excellent communication and cross‑functional collaboration abilities; thrives in a fast‑moving, ambiguous environment

## Nice to have

- Tape-out experience on an advanced process node
- Knowledge of coherent optical links or photonic‑electronic co‑design.
- Familiarity with AI/ML workloads, systolic arrays or tensor‑processing architectures.
- Contributions to open‑source RTL, verification frameworks or FPGA boards.

## Compensation & Equity

- Competitive Salary: Commensurate with your experience, skills, and location
- Equity & Ownership: Meaningful stock options. You’re not just joining the mission; you’re owning a piece of it
- Proximity Bonus: We value your time. To minimise your commute and maximise your life, we offer an annual Living-Local Bonus if your residence is within 20 minutes of the office
- Retirement Benefits: Employer-contributed retirement plans to help you build long-term financial security

Due to U.S. export control regulations, candidates’ eligibility to work at OLIX depends on their most recent citizenship or permanent residency status. We are generally unable to consider applicants whose most recent citizenship or permanent residence is in certain restricted countries (currently including Iran, North Korea, Syria, Cuba, Russia, Belarus, China, Hong Kong, Macau, and Venezuela). Applicants who have subsequently obtained citizenship or permanent residency in another country not subject to these restrictions may still be eligible.

## About OLIX

## Company Overview
- **One-liner**: OLIX, formerly known as Flux, is building a new compute paradigm using an SRAM-architecture integrated with photonics to solve the fundamental memory, energy, and speed constraints in deploying frontier AI.
- **Entity Type**: Private, Series A (raised $220M in February 2026)
- **Headquarters**: London, United Kingdom
- **Founded**: 2024
- **Founders**: James Dacombe (CEO)

## Core Business
- **Primary industry/industries**: Semiconductor Manufacturing, AI Infrastructure, Photonic Computing
- **Target customers**: Enterprise AI labs, hyperscalers, and frontier AI model developers requiring high-throughput, low-latency compute
- **Mission or purpose statement**: "Solving the most consequential problem in the deployment of frontier AI" by building infrastructure that overcomes the limits of current GPU-based memory architecture.

## Products & Services
- **OLIX Compute Platform**: A new hardware architecture combining SRAM-based compute with integrated photonics, designed to surpass HBM-based systems on throughput per megawatt and total cost of ownership (TCO), while delivering significantly better interactivity and latency than silicon-only SRAM architectures.

## Market Standing
- **Valuation**: Unicorn status; estimated $1–2.5B (latest round Feb 2026, per Dealroom)
- **Key Metric**: $220M in total funding (Series A, led by Hummingbird Ventures, with participation from Crane Venture Partners and others)
- **Notable Investors/Partners**: Hummingbird Ventures (Series A lead), Crane Venture Partners (pre-seed lead), and 4+ additional investors across seed and Series A rounds.
- **Growth Signals**: Headcount grew 420% YoY to 70 employees; operating in 6 countries (UK, US, Canada, Armenia, Romania, Germany); active job postings surged 188.9% YoY with 26 open roles as of mid-2026.

## Competitive Advantages
- **Unique photonic-SRAM architecture**: A contrarian bet that GPU-based approaches cannot simultaneously deliver high throughput and high interactivity at low cost due to physical design constraints.
- **Talent density**: Heavy hiring from top compute and AI companies (Apple, Amazon, Arm, Google, Tenstorrent).
- **First-mover in inference-era compute**: Targeting a fundamental bottleneck as frontier models require vastly more tokens per inference.

## Strategic Focus
- **Scale teams**: Aggressively hiring across engineering (ASIC/photonic design, FPGA, optics, process integration), operations, and legal in London, Austin, Toronto, Bristol, and San Francisco.
- **Prototype and productize**: Moving from architecture conception into hardware integration and manufacturing (roles include Process Integration Engineer, Opto-Mechanical Engineer, Layout Engineering Manager).
- **Transition from Flux branding**: Rebranded to OLIX in January 2026 to signal a new phase of company identity and scale.

## Why Work Here
- **In-person culture**: OLIX is an in-person company. They incentivize living within a 20-minute commute of the office with a £24,000 annual living-local bonus.
- **Compensation**: Benchmark-leading base salary, meaningful stock options (early employees build significant ownership), and workplace pension.
- **Benefits**: Comprehensive BUPA medical & dental (with Medical History Disregarded), 25 days holiday + UK bank holidays + birthday leave, meals on-site, cycle-to-work scheme, nursery scheme, visa sponsorship and relocation support.
- **Engineering environment**: M4 Mac standard (M5 Pro upgrade for engineering), on-site 3D-printing lab, noise-cancelling headphones, fully ergonomic workstation, and a culture of deep focus.
- **Impact**: "You will work with some of the best minds in photonics, systems, and compute on one of the defining problems of our era."

## Sources
1. [olix.com](https://olix.com/)
2. [olix.com/careers](https://olix.com/careers)
3. [LinkedIn - OLIX](https://www.linkedin.com/company/olix-computing)
4. [Dealroom - OLIX](https://dealroom.co/companies/olix-1/)
5. [jobs.ashbyhq.com/olix](https://jobs.ashbyhq.com/olix)

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