--- title: 'Senior Staff Hardware Qualification Engineer at d-Matrix' canonical: 'https://feeny.ai/job/senior-staff-hardware-qualification-engineer-d-matrix-santa-clara-kes5wvmjat7w' type: 'job' last_seen: '2026-09-11' --- # Senior Staff Hardware Qualification Engineer at d-Matrix - **Company:** d-Matrix - **Location:** Santa Clara, CA - **Compensation:** $175k–$265k - **Employment:** full-time - **Work type:** hybrid - **Posted:** 2026-05-06 - **Last confirmed live:** 2026-09-11 - **Apply:** https://jobs.ashbyhq.com/d-matrix/16ae871c-4e58-4e44-8476-e74e64442b80/application **Skills:** Hardware Qualification, Reliability Testing, HALT/HASS, Thermal Cycling, Vibration Testing, Signal Integrity Validation, Power Integrity Validation, Failure Analysis, X-ray, CT Scan, SEM/EDX, JEDEC Standards, IPC Standards, Telcordia Standards, High-speed Oscilloscopes, Logic Analyzers, Environmental Chambers, Weibull Analysis, Design of Experiments, Response Surface Methodology > The Senior Hardware Qualification Engineer serves as the final gatekeeper for quality and reliability of next-generation AI compute platforms. This role involves defining qualification strategies, leading stress and reliability testing, and driving failure analysis to ensure hardware durability in data center enviro... ## Job description At d-Matrix, we are focused on unleashing the potential of generative AI to power the transformation of technology. We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible. Our culture is one of respect and collaboration. We value humility and believe in direct communication. Our team is inclusive, and our differing perspectives allow for better solutions. We are seeking individuals passionate about tackling challenges and are driven by execution.  Ready to come find your playground? Together, we can help shape the endless possibilities of AI. ## Role Overview As a Senior Staff Hardware Qualification Engineer, you will be the final gatekeeper of quality and reliability for our next-generation AI compute platforms. This is a high-impact, technical leadership role responsible for defining the qualification strategies that ensure our hardware—from ASIC substrates to Rack scale systems — can withstand the rigorous demands of 24/7 data center environments. You will bridge the gap between design and mass production, ensuring that "cutting edge" doesn't mean "fragile." ## Key Responsibilities - Qualification Strategy: Define and execute comprehensive HW qualification plans (EVT/DVT/PVT) for complex AI accelerator systems, including PCIe cards OAM modules and chassis systems. - Stress & Reliability Testing: Lead the implementation of HALT/HASS, thermal cycling, humidity, and vibration testing to identify marginalities in high-power ASIC designs. - Signal & Power Integrity Validation: Provide senior-level oversight for the validation of high-speed SerDes (112G/224G/PCIe), LPDDR, CoWOS designs, and complex PDN (Power Delivery Network) transients. - Failure Analysis (FA): Drive root-cause analysis for complex system-level failures, utilizing tools like X-ray, CT scan, and SEM/EDX to distinguish between design flaws, manufacturing defects, and material fatigue. - Interconnect Reliability: Specifically oversee the qualification of high-bandwidth interconnects (NVLink/UALink equivalents) and PCIe Gen5/6 link stability. - Cross-Functional Influence: Work directly with Design, Thermal, and Firmware teams to implement hardware fixes based on qualification data. - Vendor Management: Partner with CMs (Contract Manufacturers) and JDMs to align on test methodologies and production outgoing quality limits (OQL). ## What you will bring - Education: BS/MS in Electrical Engineering, Mechanical Engineering, or Reliability Engineering. - Experience: 12+ years in hardware qualification or reliability, specifically with high-performance computing (HPC), servers, or networking hardware. - Technical Depth: Mastery of JEDEC, IPC, and Telcordia standards for hardware reliability. - Diagnostic Skills: Expert-level experience with high-speed oscilloscopes, logic analyzers, and environmental chambers. - Statistical Proficiency: Strong command of statistical methods (Weibull analysis, DOE, and JMP/Minitab) to predict product life cycles and failure rates. ## Preferred Qualifications - Experience qualifying Air and Liquid Cooling components (CDUs, cold plates, leak detection) for high-TDP AI systems. - Background in ASIC/Package-level reliability, including electromigration and Thermal Stress Analysis. - Familiarity with Python or LabVIEW for automating complex test sequences. ## Equal Opportunity Employment Policy d-Matrix is proud to be an equal opportunity workplace and affirmative action employer. We’re committed to fostering an inclusive environment where everyone feels welcomed and empowered to do their best work. We hire the best talent for our teams, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. Our focus is on hiring teammates with humble expertise, kindness, dedication and a willingness to embrace challenges and learn together every day. d-Matrix does not accept resumes or candidate submissions from external agencies. We appreciate the interest and effort of recruitment firms, but we kindly request that individual interested in opportunities with d-Matrix apply directly through our official channels. This approach allows us to streamline our hiring processes and maintain a consistent and fair evaluation of al applicants. Thank you for your understanding and cooperation. ## About d-Matrix ## Company Overview - **One-liner**: d-Matrix is building ultra-low latency, memory-centric AI inference hardware and software platforms for datacenter-scale generative AI workloads. - **Entity Type**: Private (Series C, total raised ~$429M–$450M per conflicting reports) - **Headquarters**: Santa Clara, California, USA - **Founded**: 2019 - **Founders**: Sid Sheth (CEO) & Sudeep Bhoja (CTO / Founder) ## Core Business - **Primary industries**: AI infrastructure, semiconductor / hardware acceleration, datacenter compute - **Target customers**: Cloud providers, enterprises running large-scale generative AI inference (B2B) - **Mission / purpose**: To transform AI from unsustainable to attainable by breaking through limits of latency, cost, and energy in inference. ## Products & Services - **Corsair™** – AI inference accelerator platform (PCIe form factor, chiplet-based, 3D stacked DRAM) purpose-built for the decode phase of disaggregated inference. Works alongside GPUs for low-latency interactive AI. - **JetStream™** – Purpose-built I/O accelerator for AI inference (networking fabric to scale accelerator-to-accelerator communication). - **Aviator** – Software stack that orchestrates and optimizes inference workloads on d-Matrix hardware. - **SquadRack™** – Industry’s first rack-scale, disaggregated standards-based solution for AI inference, built with infrastructure partners. ## Market Standing - **Valuation**: Not publicly disclosed (private company) - **Key metric**: Total funding – $429M (per CB Insights) or $450M (per company blog after $275M Series C). Series C announced in late 2025 / early 2026. - **Notable investors**: Temasek, M12 (Microsoft’s venture arm), Playground Global, Nautilus Venture Partners, Industry Ventures, Mirae Asset Financial Group, Triatomic Capital, Bullhound Capital. - **Growth signals**: - Corsair entered full production in June 2026. - Won “AI Processor Innovation Award” from AI Breakthrough in June 2026. - Filed 21+ patents in parallel computing, neural networks, NLP. - Opened engineering offices in Santa Clara, Toronto, Bengaluru, Sydney, and Belgrade – global expansion underway. ## Competitive Advantages - **Memory-centric compute architecture (3DIMC™)** that eliminates latency bottlenecks caused by traditional memory-bound AI inference. - Chiplet-based design enables scaling to 100B+ parameter models in a PCIe form factor. - Disaggregated, standards-based rack-scale approach (SquadRack) that integrates seamlessly with existing datacenter infrastructure. - Team of industry veterans who have shipped over 100 million chips and generated $5B+ in prior revenue. ## Strategic Focus - Scaling production of Corsair to meet customer demand for agentic AI workloads (voice agents, coding tools, real-time inference). - Building a heterogeneous compute ecosystem where d-Matrix accelerators complement GPUs rather than replace them. - Expanding software stack (Aviator) and networking (JetStream) to deliver full-stack inference solutions. ## Why Work Here - **Culture**: “Round pegs in square holes” – builders, innovators, dreamers. Emphasis on humility, direct communication, and collaboration. - **Work model**: Remote & hybrid working model (global offices in Silicon Valley, Sydney, Bengaluru, Toronto, Belgrade). - **Benefits**: Competitive pay and equity, health care, flexible time-off, paid paternity leave, 401k, on-site fitness centers, free food/snacks, peer coaching & development, team-building activities. - **Engineering environment**: Work with world-leading engineers and researchers on cutting-edge AI hardware/software. Opportunity to shape the future of AI inference infrastructure. ## Sources 1. [d-matrix.ai – Homepage](https://www.d-matrix.ai/) 2. [d-matrix.ai – About / Leadership](https://www.d-matrix.ai/about/) 3. [d-matrix.ai – Careers](https://www.d-matrix.ai/careers/) 4. [d-matrix.ai – Corsair Production & AI Breakthrough Award](https://www.d-matrix.ai/announcements/d-matrix-corsair-ai-inference-platform-enters-full-production-to-meet-customer-demand/) 5. [CB Insights – d-Matrix Company Profile](https://www.cbinsights.com/company/d-matrix) 6. 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