--- title: 'Senior Staff Software Engineer, Linux Runtime & Drivers at Efficient Computer' canonical: 'https://feeny.ai/job/senior-staff-software-engineer-linux-runtime-drivers-efficient-computer-san-6yjpxkgxh9mh' type: 'job' last_seen: '2026-10-15' --- # Senior Staff Software Engineer, Linux Runtime & Drivers at Efficient Computer - **Company:** Efficient Computer - **Location:** San Francisco Bay Area OR Pittsburgh, PA - **Posted:** 2026-10-06 - **Last confirmed live:** 2026-10-15 - **Apply:** https://job-boards.greenhouse.io/efficientcomputer/jobs/4434742009 ## Job description Efficient Computer is rethinking computing from the ground up to solve one of AI's biggest challenges: energy. Our Fabric architecture delivers a 10–100x improvement in energy efficiency for general-purpose computation, including AI, while supporting familiar programming languages and software frameworks—unlocking new possibilities for autonomous machines, intelligent infrastructure, wearables, and space systems. With our first processor, Electron E1, now shipping in volume and more than $97 million in Series B financing recently announced, we're accelerating customer deployments and scaling our architecture to data center performance. Join us to build the hardware and software that bring intelligence wherever it's needed and help shape the next generation of computing. Efficient Computer is building the next generation of energy efficient, general-purpose processors designed around the Fabric architecture, a novel spatial dataflow design spun out from decades of fundamental SOC research at CMU. We are looking for a Senior Staff Linux Runtime Software Engineer to own the user-mode components that interface with the Fabric and support the effcc compiler.  This includes owning the user-mode driver, interfacing with our kernel mode driver,  as well as defining the HAL interface exposed by the Fabric ABI.  You will be working within pre-silicon environments, involving QEMU, functional simulation, emulation, and FPGAs to ensure applications run on day one. This is a key role for the System Software team.   As such, you will work closely with the compiler, kernel driver, architecture, micro-architecture, and verification teams during all phases of development. ## Key Responsibilities Own the Runtime Library and User-Mode Driver - Design, implement, and maintain the user-mode runtime driver for the Fabric accelerator.  This is a critical shared library which sits between the compiler and the Fabric ABI.  This library implements context management, program loading, resource management, command queue construction and submission, descriptor allocation and setup, streaming, completion queue/event synchronization, error handling,  logging, memory allocation, as well as general library support. - Design and implement all user-mode interfaces between the compiler, the Fabric ABI, and the kernel mode driver. - Define the in-memory representations generated by the compiler and consumed by the Fabric. - Design and implement the underlying runtime library support and interfaces needed by 3rd party ML framework backends used by PyTorch, ONNX, and/or TensorFlow. - Lead the user-mode efforts to bring up on first silicon.  This includes being comfortable with functional simulation, emulation and FPGA environments. - Establish runtime test coverage, including API unit and conformance tests, emulation-based regression suites, performance benchmarks, and hardware-in-the-loop validation. Required Qualifications - B.S. in Electrical/Computer Engineering, Computer Science, or equivalent; M.S. a plus. - 7+ years of systems software experience, including significant hands-on Linux user-mode driver as well as language runtime library development for accelerators (GPUs, NPUs, DSPs, FPGAs, or similar). - Experience building or contributing to a production accelerator runtime software stack, from the driver API up through the user-facing runtime library. - Solid understanding of accelerator memory models, in particular unified memory systems, allocators, and zero-copy data paths. - Experience designing public APIs exposed by runtime libraries: ABI stability, versioning, error models, thread safety, and documentation. - Experience working with compiler teams on binary formats, loaders, launch ABIs, and kernel metadata, for ahead-of-time or just-in-time compilation. - Experience integrating runtimes with language runtimes or ML frameworks: Python bindings, framework backends or execution providers, and C/C++ application interfaces. - Hands-on experience with QEMU, emulation, or simulation environments during pre-silicon development. - Experience designing interfaces between kernel and user space: ABI and HAL design, synchronization, memory sharing, and error handling. - Strong user-mode debugging skills across crash analysis, sanitizers, tracing, profiling, and race and synchronization diagnosis. - Working knowledge of ARM/AArch64 Linux systems and the Linux driver model. - Expert C and C++ and strong Python skills; comfortable working with AI-assisted development tools for code, analysis, and debugging. Desired Qualifications - Experience contributing to CUDA Runtime  (cudart), ROCm (HIP, ROCr, HSA), the Tenstorrent runtime (TT-Metalium), oneAPI Level Zero, OpenCL, or another accelerator runtime software stack. - Familiarity with LLVM or MLIR, and with how compilers for accelerators hand off to runtimes. - Knowledge of dataflow, spatial, or other novel compute architectures, and of how compilers and runtimes target them. - Experience on a first-generation silicon product, where the software stack and the hardware matured together. - Experience with FPGA prototyping and hardware emulation platforms (Palladium, Zebu, Veloce, or similar). We offer a competitive base salary for this role, generally ranging from $220,000 to $270,000, plus a 10% annual bonus, meaningful equity, and comprehensive benefits. Final compensation will depend on experience, level, and location, with flexibility for the right candidate. Why Join Efficient? Build what's next. At Efficient, you'll tackle big challenges with room to take ownership and make an impact. We back you with competitive pay, equity, a 401(k) match, company-paid benefits, paid parental leave, and flexibility—plus opportunities to grow your skills and career as we scale. ## About Efficient Computer ## Company Overview - **One-liner**: Efficient Computer is building the world’s most energy-efficient general-purpose processor by combining a novel Fabric architecture with an intuitive compiler, targeting edge AI, industrial automation, space/defense, and beyond. - **Entity Type**: Private (Series A) - **Headquarters**: Pittsburgh, Pennsylvania, United States - **Founded**: 2022 - **Founders**: Brandon Lucia (CEO) and Nathan Beckmann (Chief Architect) ## Core Business - Primary industry/industries: Semiconductor / Computer Hardware / AI Chips - Target customers: B2B – OEMs and systems integrators in edge AI, industrial automation, satellite/space, automotive, defense, and consumer electronics - Mission or purpose statement: To set a new standard for energy efficiency in general-purpose computation, enabling applications that are infeasible today due to energy constraints. [efficient.computer/about](https://www.efficient.computer/about) ## Products & Services - **[Electron E1 Processor]**: A general-purpose processor featuring the proprietary Fabric architecture and 4MB of on-chip MRAM. It replaces von Neumann execution with a spatial dataflow model, delivering up to 1 TOPS/W and scaling from 5.4 GOPS to 21.6 GOPS. Designed for always-on AI inference at the edge. [efficient.computer/technology](https://www.efficient.computer/technology) - **[effcc Compiler]**: A drop-in replacement for GCC/Clang that automatically extracts parallelism from C, C++, and TFLite code and maps it to the Fabric architecture. Provides ultra-fast compilation times and a GDB-compatible debugging experience. [efficient.computer/technology](https://www.efficient.computer/technology) - **[Fabric Architecture]**: The core technology – a tiled grid of reconfigurable compute nodes that eliminates instruction fetch and decode overhead, achieving 10–100× energy efficiency gains over traditional CPUs and GPUs. [efficient.computer](https://www.efficient.computer/) ## Market Standing - **Valuation/Market Cap**: Not disclosed (private company) - **Key Metric**: Total Funding – $70.0M across 3 rounds (Seed and Series A) - **Notable Investors/Partners**: Triatomic Capital (led Series A), Eclipse (led Seed round). Key advisors include Alex Hawkinson (founder of SmartThings and BrightAI). [linkedin.com/company/efficientcomputer](https://www.linkedin.com/company/efficientcomputer) - **Growth Signals**: - 46 employees (+79.4% YoY, +27 people) - 13,966 LinkedIn followers (+180.4% yearly growth) - First silicon product (Electron E1) delivered to customers in mid-2025, ramping to volume distribution in 2026 - Customer traction in physical AI, space/defense, automotive, and consumer products ## Competitive Advantages - **Fabric Architecture**: A fundamentally new compute paradigm that is 10–100× more energy-efficient than traditional CPUs/GPUs for general-purpose workloads, including AI inference. - **Full Programmability**: Unlike specialized accelerators that only optimize isolated kernels, the Fabric architecture accelerates entire applications without requiring code rewrites. - **Proven Silicon**: Two silicon implementations (Electron E0 prototype and Electron E1 product) are already in customer hands. - **World-Class Team**: Founders and key engineers are leading computer architects from Carnegie Mellon University, with deep expertise in efficient computing. ## Strategic Focus - Scale the Electron E1 processor into high-volume production and distribution (targeting 2026). - Expand into multiple verticals: physical AI, industrial automation, space/satellite, defense, automotive, and consumer electronics. - Continue developing the effcc compiler ecosystem to support more frameworks and languages. - Grow the engineering team, particularly in physical design, verification, architecture, and software optimization. ## Why Work Here - **Cutting-Edge Technology**: Work on a novel processor architecture that redefines energy efficiency for the AI era. - **Strong Growth Trajectory**: The company is scaling rapidly (nearly 80% headcount growth YoY) with a clear product-market fit and customer traction. - **Engineering-Centric Culture**: 43% of the workforce is in technical roles, with a focus on computer architecture, compiler design, and silicon engineering. - **Compensation & Benefits**: Competitive base salaries, meaningful startup equity, 401k matching, and a choose-your-own-adventure equipment allowance. [efficient.computer/about](https://www.efficient.computer/about) - **Work Locations**: Offices in Pittsburgh, PA; San Jose, CA; and Austin, TX. Roles are on-site/hybrid at these hubs. - **Values-Driven**: The company emphasizes integrity, impact, and accountability. [efficient.computer/about](https://www.efficient.computer/about) - **Open Roles (as of mid-2026)**: 7 active positions including Design Verification Manager, Hardware Infrastructure & CI/CD Engineer, Senior Product Managers (Hardware/Software), Computer Architect, and Lead Physical Design Engineer. ## Sources 1. [efficient.computer](https://www.efficient.computer/) 2. [efficient.computer/about](https://www.efficient.computer/about) 3. [efficient.computer/technology](https://www.efficient.computer/technology) 4. [linkedin.com/company/efficientcomputer](https://www.linkedin.com/company/efficientcomputer) 5. [job-boards.greenhouse.io/efficientcomputer](http://job-boards.greenhouse.io/efficientcomputer) ## Other roles at Efficient Computer - [Senior Digital Verification Engineer - Contract](https://feeny.ai/job/senior-digital-verification-engineer-contract-efficient-computer-san-francisco-mjpgnhkgs2v1) — San Francisco Bay Area OR Pittsburgh PA OR Austin, TX - [Senior RTL Design Engineer](https://feeny.ai/job/senior-rtl-design-engineer-efficient-computer-san-francisco-bay-area-or-g455vsttm900) — San Francisco Bay Area OR Pittsburgh PA OR Austin, TX - [Senior Staff Software Engineer, Linux Kernel](https://feeny.ai/job/senior-staff-software-engineer-linux-kernel-efficient-computer-san-francisco-r05772pqmge3) — San Francisco Bay Area OR Pittsburgh, PA - [Director of Information Security](https://feeny.ai/job/director-of-information-security-efficient-computer-san-fransisco-bay-area-or-3qgtbb5s7akq) — San Fransisco Bay Area OR Pittsburgh PA OR Austin TX, OR - [Field Application Engineer](https://feeny.ai/job/field-application-engineer-efficient-computer-san-fransisco-bay-area-or-rc9h53md7wmv) — San Fransisco Bay Area OR Pittsburgh, PA - [Software Technical Program Manager](https://feeny.ai/job/software-technical-program-manager-efficient-computer-austin-tx-pittsburgh-pa-t2mjrgj9mdh6) — Austin TX Pittsburgh PA San Francisco California, United States - [Director of Finance](https://feeny.ai/job/director-of-finance-efficient-computer-san-francisco-bay-area-or-pittsburgh-pa-sn2jt5nqyee9) — San Francisco Bay Area OR Pittsburgh PA OR Tucson AZ OR Austin, TX - [IT Manager](https://feeny.ai/job/it-manager-efficient-computer-san-francisco-bay-area-or-pittsburgh-pa-or-tucson-35rph57ygvt1) — San Francisco Bay Area OR Pittsburgh PA OR Tucson, AZ - [Staff Digital Verification Engineer](https://feeny.ai/job/staff-digital-verification-engineer-efficient-computer-san-francisco-bay-area-gbtgaqxktxcn) — San Francisco Bay Area OR Pittsburgh PA OR Austin, TX - [Senior Embedded Engineer](https://feeny.ai/job/senior-embedded-engineer-efficient-computer-san-francisco-bay-area-or-pittsburgh-wap31cd60m1c) — San Francisco Bay Area OR Pittsburgh, PA