---
title: 'SerDes Validation Leader at Delos Data Inc'
canonical: 'https://feeny.ai/job/serdes-validation-leader-delos-data-inc-remote-cgr5a14pkbw8'
type: 'job'
last_seen: '2026-09-15'
---

# SerDes Validation Leader at Delos Data Inc

- **Company:** Delos Data Inc
- **Location:** Remote
- **Employment:** full-time
- **Work type:** remote
- **Posted:** 2026-09-14
- **Last confirmed live:** 2026-09-15
- **Apply:** https://jobs.ashbyhq.com/delos-data/d0ea09a0-8335-4f4c-addb-a75ca23cc0b8

## Job description

SerDes Validation Lead

## Who we are

We are a stealth-mode startup building foundational technology to address performance, scalability, and resiliency challenges in large-scale AI data center clusters. We are backed by top-tier VC firms and notable angel investors. The company is led by experienced builders and operators who have founded companies, taken them to scale, and exited successfully. We work with a strong sense of unity and shared responsibility, and we expect trust, integrity, and respect in how we collaborate and make decisions. We hold ourselves accountable to one another and to the quality of the work we deliver. Headquartered in Silicon Valley, we operate across a mix of remote and on-site locations in the U.S. and Canada. We aim to create an environment where people are treated fairly, supported in their growth, and empowered to do meaningful work alongside others who take the craft seriously.

## About the role

We are seeking a SerDes Implementation Lead to own the physical-layer implementation, configuration, tuning, and post-silicon validation of ultra-high-speed data links, including 112G and 224G PAM4. This is a hands-on technical role for someone who has taken SerDes IP macros from integration through bring-up, tuned equalization parameters in real systems, and driven links to stable operation across challenging physical channels. You will work closely with signal integrity, power integrity, hardware, and firmware teams to correlate real-world channel behavior with transceiver settings and system-level performance.

## What you’ll do

- Drive implementation and register-level configuration of high-speed SerDes IP blocks across custom hardware systems.
- Own transceiver equalization tuning, including CTLE, FFE, and DFE tap optimization, to maximize eye margin and minimize bit error rates across cable, backplane, and board-level topologies.
- Lead post-silicon physical-layer bring-up, characterization, and debugging of 112G and 224G PAM4 links.
- Use high-bandwidth oscilloscopes, BERTs, pattern generators, and protocol analyzers to validate link performance and isolate issues.
- Collaborate closely with SI/PI engineers to correlate lab-measured link behavior with layout, simulation, and channel models.
- Work with firmware teams to support real-time link monitoring, configuration control, and automated validation flows.
- Develop and run script-based lab automation, including Python-based test, measurement, and characterization workflows.
- Help define best practices for SerDes bring-up, tuning, debug, and validation across the company’s hardware platforms.

## What we’re looking for

- Proven hands-on experience bringing up and validating physical 56G, 112G, or 224G PAM4 links, or high-speed PCIe Gen5/Gen6 interfaces.
- Deep practical understanding of SerDes implementation, configuration, equalization, and physical-layer debug.
- Strong knowledge of how TX/RX equalization settings affect signal integrity, jitter profiles, eye margin, and BER.
- Advanced proficiency with high-speed lab equipment, including BERTs, real-time or sampling oscilloscopes, pattern generators, and protocol analyzers.
- Experience with automated, script-based testing and lab characterization, preferably using Python.
- Ability to debug complex link issues across silicon, board, cable, backplane, firmware, and system-level interactions.
- Strong collaboration skills and the ability to work closely with SI/PI, hardware, firmware, and systems teams in a fast-moving engineering environment.

## Nice to have

- Experience with 112G or 224G PAM4 links in data center, networking, switch, accelerator, or high-performance compute environments.
- Familiarity with Ethernet, PCIe, CXL, or other high-speed protocols.
- Experience working with SerDes IP from major commercial IP providers or custom in-house SerDes teams.
- Exposure to channel modeling, compliance testing, and production validation flows.

Compensation: Target base salary for this role is $180,000 – $260,000 per year, plus meaningful equity, benefits, and 401(k). Salary ranges are determined by role, level, experience, and location. We are an equal opportunity employer. We value a range of perspectives and experiences and make employment decisions based on merit and business needs. We do not discriminate on the basis of legally protected characteristics. Agency Note: We do not accept resumes from agencies or search firms. Please do not forward candidate profiles through our careers page, email, LinkedIn messages, or directly to company employees. Any resumes submitted will be deemed the property of the company, and no fees will be paid in the event the candidate is hired.

## About Delos Data Inc

## Company Overview
- **One-liner**: Delos Data builds a new interconnect architecture and server design purpose-built for AI inference, enabling faster, more scalable inference by eliminating network bottlenecks.
- **Entity Type**: Private (Stealth/Seed stage)
- **Headquarters**: Palo Alto, California, USA
- **Founded**: 2025
- **Founders**: Ed Doe (CEO & Co-Founder), Dan Daly (CTO & Co-Founder)

## Core Business
- **Primary Industry**: Semiconductor Manufacturing / AI Infrastructure
- **Target Customers**: Hyperscalers, AI infrastructure builders, and enterprises scaling AI inference workloads (B2B)
- **Mission/Purpose**: To deliver the world's most capable and responsive intelligence by building an interconnect purpose-built for AI inference, not borrowed from HPC, cloud, or training.

## Products & Services
- **Nonstop AI™**: A new cluster architecture and server design that accelerates AI inference through cabled scale-up. It reduces GPU idle time caused by data center interconnect bottlenecks and is designed to flexibly scale to thousands of GPUs, CPUs, and accelerators.
- **Delos Server**: Brings scale-up IO to the network fabric, enabling larger scale-up domains for inference.
- **Delos Mosaic™**: Software providing fine-grained visibility into the scale-up domain, allowing for real-time inference bottleneck detection and AI workload tuning.

## Market Standing
- **Valuation**: Not publicly disclosed (Private, early-stage company)
- **Key Metric**: Total funding not publicly disclosed; company is in early access deployment with select customers.
- **Notable Investors/Partners**: Not publicly disclosed; company exhibited at NVIDIA GTC 2026 (Booth 150) and will demonstrate at Computex 2026 (Booth J1328).
- **Growth Signals**: 
  - Founded in 2025, already has 3 employees with 25% monthly headcount growth.
  - 7 active job postings as of mid-2026.
  - Announced Nonstop AI™ architecture in May 2026 with early access deployments.
  - Exhibited at major industry events (NVIDIA GTC 2026, Computex 2026).
  - Website traffic growing 39.4% month-over-month.

## Competitive Advantages
- **Purpose-built for inference**: Unlike competitors who borrow interconnects from HPC, cloud, or training, Delos Data builds an interconnect specifically designed for AI inference workloads.
- **Cabled scale-up architecture**: Enables flexible scaling to thousands of GPUs, CPUs, and accelerators, reducing GPU idle time caused by network bottlenecks.
- **Full-stack approach**: Combines hardware (Delos Server), software (Delos Mosaic™), and silicon expertise to deliver a unified system-level solution.
- **Ecosystem compatibility**: Built to work within today's GPU and accelerator ecosystems, making adoption easier for hyperscalers and enterprises.
- **Founding team pedigree**: CTO Dan Daly and CEO Ed Doe bring deep expertise from leading semiconductor and AI companies.

## Strategic Focus
- **Product launch and market entry**: Currently in early access with select customers, with broader availability planned for Q4 2026.
- **Scaling the team**: Actively hiring across engineering (system software, DFT, verification, SDET), advanced packaging, and people operations roles.
- **Building the brand**: Establishing presence at major industry events (NVIDIA GTC, Computex) to build credibility and attract top talent.
- **Targeting hyperscalers and AI infrastructure builders**: The primary customer base for the Nonstop AI™ architecture.

## Why Work Here
- **Mission-driven work**: Opportunity to build foundational infrastructure for the next generation of AI, working on a problem the founders describe as "the next leap in AI performance."
- **Early-stage impact**: Join a company founded in 2025 with only 3 employees, offering significant ownership and influence over product and culture.
- **Hybrid/Remote flexibility**: Roles are listed as both remote and hybrid (Palo Alto, CA and Montréal, QC, CAN), with a "Remote Workspace" designation for many positions.
- **Founding team**: Work directly under experienced leadership (CTO Dan Daly, CEO Ed Doe) with deep expertise in semiconductors and AI.
- **Cutting-edge tech stack**: Work with Kubernetes, PyTorch, CUDA, SystemVerilog, Python, Terraform, and more across hardware and software domains.
- **High-growth trajectory**: 25% monthly headcount growth, active hiring across 7+ roles, and strong momentum from major industry events.

## Sources
1. [delosdata.com](https://delosdata.com/)
2. [builtin.com](https://builtin.com/company/delos-data)
3. [linkedin.com](https://www.linkedin.com/company/delosdata)
4. [delosdata.com/press](https://www.delosdata.com/press/faster-ai-inference-enabled-by-1000x-higher-scale-with-delos-data-nonstop-ai)
5. [opencorpdata.com](https://opencorpdata.com/us-va/11860584)

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