--- title: 'Signal Integrity Engineer-1.6 OSFP Board Design at Lumilens' canonical: 'https://feeny.ai/job/signal-integrity-engineer-1-6-osfp-board-design-lumilens-bengaluru-xzxf4qktkpr2' type: 'job' last_seen: '2026-09-14' --- # Signal Integrity Engineer-1.6 OSFP Board Design at Lumilens - **Company:** Lumilens - **Location:** Bengaluru, India - **Employment:** full-time - **Work type:** onsite - **Posted:** 2026-02-04 - **Last confirmed live:** 2026-09-14 - **Apply:** https://jobs.ashbyhq.com/lumilens/7798d00c-e4e3-48d6-a43e-065d41bc1c5e ## Job description Signal Integrity Engineer –1.6T OSFP Board Design Bengaluru, Karnataka, India / Onsite ## ABOUT LUMILENS At Lumilens we are building the critical photonics infrastructure that powers tomorrow’s AI supercomputing. From chip-to-chip optical interconnects to scalable photonic engines, Lumilens is unlocking a new era of computing faster, cooler, and massively more efficient. We’re a well-funded startup backed by Mayfield and led by veterans who’ve built And scaled some of the most transformative technologies in the industry. This isn’t incremental innovation, it’s a ground-floor opportunity to rethink the optical layer from the silicon up. You’ll work alongside a team of world-class engineers solving some ofthe hardest challenges in optics, systems, and scale. Every line of code, every design decision, every breakthrough you help deliver will shape the infrastructure of tomorrow. If you're looking for mission, momentum, and the chance to make an outsized impact jump on the rocket ship. We’re just getting started. ## Role Overview We are seeking a Signal Integrity (SI) Engineer with 6–10 years of experience to own board-level high‑speed electrical design for 1.6T DR8 (200G/lane) OSFP optical modules, from pre‑layout simulations through validation and production support. Key Responsibilities: - Own SI/PI design for 1.6T DR8 OSFP module host and line‑side interfaces, including 200G PAM4 lanes, DSP/ASIC interfaces, retimer/gearbox and connector transitions on the module PCB - Perform pre‑ and post‑layout SI simulations (time and frequency domain) for very high‑speed channels: insertion/return loss, crosstalk, impedance, eye diagrams, COM and bathtub analysis. - Define PCB stack‑up, materials, via technology, routing rules and design constraints to meet loss budgets and margin targets at 200G per lane within OSFP mechanical constraints. - Generate clear SI/PI design guidelines for schematic and layout engineers; review schematics and layout (diff‑pair routing, reference transitions, stitching, breakouts) and sign off on SI. - Collaborate closely with optical, mechanical, firmware and test teams on overall 1.6T module architecture, pin‑outs, power partitioning and control interfaces. - Plan and execute lab bring‑up and correlation: TDR, VNA/S‑parameter measurements, eye/PAM4 analysis, jitter decomposition and de‑embedding to validate and refine models. - Drive SI‑related root‑cause debug on proto and production builds, propose design changes and work with manufacturing/NPI to ensure robust, repeatable performance. - Contribute to technical documentation: SI test plans, simulation reports, design guidelines, and lessons‑learned for future OSFP generations. Required Qualifications: - ⁠B.E/[B.Tech](http://B.Tech) or M.E/[M.Tech](http://M.Tech) in Electrical/Electronics Engineering (or equivalent) with 6–10 years of experience in high‑speed board‑level design/SI for networking, server or optical module products. - Strong hands‑on experience with pre/post‑layout SI simulations on SerDes links ≥56G, ideally 100G/200G PAM4, using tools such as Sigrity, ADS, HFSS, SIwave, HSPICE or similar. - Proven track record defining PCB stack‑ups, materials (e.g., low‑loss laminates), via structures and routing rules for multi‑hundred‑Gbps interfaces on dense form‑factor modules or line cards. - Strong understanding of: transmission lines, S‑parameters, equalization (FFE/DFE/CTLE), jitter, crosstalk, return path design, reference plane design and power distribution networks. - Solid lab skills with high‑bandwidth scopes, VNAs, BERTs and TDRs, including fixture design/de‑embedding and correlation of measurements to simulations. - Experience working with cross‑functional teams (layout, optics, mechanical, FW, test, manufacturing) on complex hardware projects through multiple prototype spins. - Good written and verbal communication to clearly document constraints, justify design decisions and review results with stakeholders. Preferred Qualifications: - Experience specifically with OSFP/QSFP‑DD/OSFP‑XD optical transceiver modules at 800G/1.6T or similar data‑center interconnect products. - Familiarity with high‑speed optical components and interfaces: drivers, TIAs, CDRs/DSPs, laser/photodiode sub‑assemblies, and their electrical constraints. - Exposure to relevant standards and ecosystems (e.g., IEEE 802.3 DR8/FR8/LR8‑class interfaces, OIF/OTN, common management interfaces) is a plus. - Basic understanding of EMI/EMC, thermal constraints and mechanical limitations for pluggable modules, and how they interact with SI/PI decisions. ## What we offer - Competitive salary commensurate with experience - Comprehensive benefits package including health insurance - Professional development opportunities and certification support - Access to cutting-edge technology and cloud platforms - Collaborative work environment with cross-functional teams *Lumilens is an equal opportunity employer. All qualified applicants will receive consideration without regard to race, color, religion, gender, identity, orientation, veteran status, disability, or any other legally protected status. ## About Lumilens ## Company Overview - **One-liner**: Lumilens designs and manufactures next-generation photonic interconnects to massively scale AI compute infrastructure. - **Entity Type**: Private (Series B – led by Accton Technology; prior Series A of $30M from Mayfield and Spark Capital) - **Headquarters**: San Jose, California, USA - **Founded**: 2024 - **Founders**: Ankur Singla (CEO), Samuel Liu (VP Products), Ritesh Kapahi (VP/GM India), Dave Friedman (VP Operations) ## Core Business - **Primary industry**: Photonics / optical interconnects for AI data centers - **Target customers**: Large-scale AI providers and hyperscale data center operators (B2B, Enterprise) - **Mission**: “To rapidly innovate in photonics and connectivity architectures to enable the massive scaling of compute infrastructure required to deliver the full potential of AI.” ## Products & Services - **Photonic Interconnects (Scale-Out & Scale-Up)**: High-density, low-latency optical links that enable cluster-to-cluster and direct GPU-to-GPU connectivity. Supports 100x higher quantity of GPU direct connections than legacy approaches. - *Type*: Hardware (silicon photonics modules) + integrated manufacturing - **Automated Manufacturing Platform**: End-to-end custom robotics and AI-optimized production processes to maximize yield, quality, and supply-chain flexibility. - *Type*: Service / Manufacturing capability (in-house) ## Market Standing - **Valuation/Market Cap**: Not publicly available - **Key Metric**: Total funding – $30M Series A (June 2024); Series B led by Accton Technology (amount undisclosed) - **Notable Investors/Partners**: Mayfield, Spark Capital, Accton Technology - **Growth Signals**: - Headcount grew 287% YoY (54 employees as of mid-2025) [linkedin.com] - Operations in 8 countries: USA, India, Thailand, Poland, Singapore, Czechia, South Korea, Malaysia - 48 active job postings (+23.1% monthly growth) [linkedin.com] - Leadership team with deep photonics/networking experience from Cisco, Juniper, Meta, Lumentum, Coherent ## Competitive Advantages - **In-house silicon photonics development** – full control over design and supply chain - **Systems-level expertise** – can partner on both scale-out and scale-up architectures - **Manufacturing automation** – robotics + AI processes enable faster innovation, higher quality, and predictable deployment - **Standards-based interconnects** – easy deployment into existing infrastructure - **Manufacturing anywhere** – supply-chain continuity and scalable manufacturing ## Strategic Focus - Enable massive scaling of AI infrastructure by overcoming electrical/copper limitations with advanced photonics - Disaggregate GPUs to mitigate power and density challenges in data centers - Expand manufacturing capacity globally and continue to automate production - Align product roadmap with industry standards to accelerate adoption ## Why Work Here - **Culture**: Fast-paced startup environment with deep technical expertise; mission-driven focus on enabling the future of AI - **Work policy**: In-office (HQ San Jose, CA with Bengaluru, India as major hub) [builtin.com] - **Perks**: Opportunity to work on cutting-edge photonics, robotics, and AI manufacturing; direct impact on world’s largest AI infrastructure - **Engineering culture**: Heavy emphasis on silicon photonics, hardware design, robotics automation, and system-level architecture. Teams are led by veterans from Cisco, Juniper, Meta, Lumentum, Coherent. ## Sources 1. [lumilens.com](https://lumilens.com/) – Company overview, mission, leadership, products 2. [lumilens.com/company](https://lumilens.com/company) – Vision, investors, leadership team 3. [builtin.com](https://builtin.com/company/lumilens) – Career page, employee count, year founded, office policy 4. [linkedin.com](https://www.linkedin.com/company/lumilens) – Headcount, funding details, geographic/department breakdown, job trends, talent sources 5. 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