---
title: 'Simulator & Debug Tools Lead at Normal Computing Corporation'
canonical: 'https://feeny.ai/job/simulator-debug-tools-lead-normal-computing-corporation-mountain-view-tg38bb3b0dx4'
type: 'job'
last_seen: '2026-10-29'
---

# Simulator & Debug Tools Lead at Normal Computing Corporation

- **Company:** Normal Computing Corporation
- **Location:** Mountain View, CA
- **Employment:** full-time
- **Work type:** hybrid
- **Posted:** 2026-10-22
- **Last confirmed live:** 2026-10-29
- **Apply:** https://jobs.ashbyhq.com/normalcomputing/433256ca-a4d9-4339-9613-fb205442bebc

## Job description

Normal Computing | Build with Us Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), and London.

## The Role

Normal's hardware runs the most memory-bound parts of large-model inference inside memory itself, rather than shuttling weights to a processor. The software that makes this programmable doesn't exist yet in any standard form. Nothing off the shelf simulates it, so the tool our compiler and hardware teams depend on to validate their work before silicon exists has to be built, not bought. As our Simulator & Debug Tools Lead, you will own that simulator, along with the debugging and profiling tools that integrate with our compiler. This is a hands-on technical leadership role. Fidelity, speed, and tooling all compete for the same hours, and you will decide where those hours go, keeping the rest of the team honest about what the chip can actually do.

## What You Will Own

- Simulator Architecture: Own the architecture and roadmap of our hardware simulator, including accuracy, performance, and coverage of new hardware features as they land. Success means compiler and runtime work never waits on hardware.
- Behavioral Correctness: Make the simulator's behavior, state, and memory semantics trustworthy enough that compiler and runtime engineers can act on what it tells them.
- Debug and Profiling Tools: Build the debuggers, tracers, and profilers engineers actually reach for, measured by how quickly the team can find and fix a bug.
- Hardware Correlation: Partner with our Design Verification and bring-up teams to correlate the simulator with RTL, FPGA prototypes, and eventually silicon, and close the loop when they disagree.
- Workload Benchmarks: Build simulator benchmarks and traces from LLM inference workloads, so fidelity is measured against what the chip actually needs to run.
- Investment Tradeoffs: Decide where simulator fidelity, simulator speed, and tooling investment go, and explain those tradeoffs to the compiler and hardware teams.

What Makes You a Great Fit

- Experience building or leading development on hardware simulators, cycle-accurate or functional, for ASICs or novel compute architectures
- Tooling instincts: you have built debuggers, tracers, or profilers that other engineers actually adopted
- Enough systems and compiler context to simulate the software stack running on the hardware, as well as the hardware itself
- Comfort working where the hardware being simulated is still evolving, and the simulator has to evolve with it
- Fluency in C++ or Rust for simulator performance, and familiarity with Python for tooling

Bonus Points

- Experience with in-memory compute or other non-von-Neumann architectures
- Experience building simulators that fed directly into architectural or compiler decisions, beyond post-hoc validation
- Experience with open-source simulation, tracing, or hardware-tooling communities
- Background spanning both pre-silicon simulation and post-silicon bring-up

## Equal Employment Opportunity Statement

Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status. Accessibility Accommodations Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com. Privacy Notice By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our [Applicant Privacy Notice](https://normalcomputing.com/applicant-privacy-notice).

## About Normal Computing Corporation

## Company Overview
- **One-liner**: Normal Computing builds AI-accelerated EDA software and physics-based ASICs to enable ultra-efficient hardware for the AI era.
- **Entity Type**: Private (Series B; total funding $92.5M)
- **Headquarters**: New York, New York, USA
- **Founded**: 2022
- **Founders**: Faris Sbahi (CEO), Matthias Tan (Co-Founder), and team of former Google Brain/Google X engineers and scientists

## Core Business
- Primary industry: Semiconductor design (EDA) and custom silicon (ASICs), powered by AI and probabilistic computing.
- Target customers: Large semiconductor design and manufacturing institutions (B2B, enterprise).
- Mission: "Rewriting AI foundations to advance the frontier of reasoning and reliability in the physical world" and enabling a virtuous cycle of self-improving AI hardware.

## Products & Services
- **[Normal EDA](https://normalcomputing.com/)**: An AI-driven electronic design automation platform that understands design intent from specification documents, generates hierarchical test plans with traceability, creates SystemVerilog stimulus, runs simulations, and tracks coverage. It continuously learns from team feedback to accelerate verification for complex chip designs.
- **[Normal ASICs](https://normalcomputing.com/)**: Physics-based custom ASICs that relax traditional computing assumptions (stochastic, stateful, asynchronous) to unlock orders-of-magnitude more efficient compute. Designed to converge hardware with the physical dynamics of AI models.

## Market Standing
- **Valuation/Market Cap**: Not publicly disclosed.
- **Key Metric**: **Total Funding** – $92.5M across multiple rounds (Seed, Venture, Grant, Series B). Notable recent round: $50M led by **Samsung Catalyst** in March 2026 [normalcomputing.com](https://normalcomputing.com/).
- **Notable Investors**: Samsung Catalyst Fund, Intel Ignite, First Spark Ventures, Celesta Capital, ARIA. Also partners with Fraunhofer IESE (DRAMBench benchmark).
- **Growth Signals**: Headcount grew **196.3% YoY** to 54 employees; operates across 6 countries (US, UK, Denmark, Switzerland, India, Canada); actively building open-source tools (e.g., a Verilog simulator built with AI: 580K lines in 43 days).

## Competitive Advantages
- **Physics-First Approach**: Unlike traditional digital logic, Normal’s ASICs embrace stochastic, stateful, and asynchronous computing – aligning hardware with the physics of AI models for dramatic efficiency gains.
- **Full-Stack Co-Design**: The combination of AI-native EDA tools and custom silicon creates a closed loop where software and hardware are co-optimized, shortening time-to-market and enabling workload-specific ASICs.
- **Deep AI Heritage**: Founders and team hail from Google Brain and Google X, bringing deep expertise in probabilistic ML, quantum AI, and physical-world reasoning.

## Strategic Focus
- **Scaling EDA Adoption**: Expanding Normal EDA’s use among top semiconductor companies to "make chip design look more like software".
- **AI Hardware Energy Crisis**: Tackling soaring power demands of AI by delivering ultra-efficient ASICs that can be produced for every workload.
- **Open-Source & Research**: Building community trust through open benchmarks (DRAMBench) and tools (CIRCT-based verification), while advancing formal methods and AI-driven simulation.

## Why Work Here
- **Hybrid Workspace**: Flexible in-office collaboration at offices in **New York (Flatiron HQ)**, **San Francisco**, **London**, and **Copenhagen**. In-person collaboration is valued but with flexibility; free lunch, snacks, and beverages in office.
- **Lean, High-Impact Team**: Small team (54 employees) where every member drives significant impact, works directly with customers, and owns meaningful parts of the product.
- **Interdisciplinary Challenges**: Work spans AI, probabilistic software, hardware, physics, and full-stack engineering – ideal for curious, passionate problem-solvers.
- **Strong Growth Trajectory**: Rapid headcount growth (+196% YoY), recent $50M Series B, and partnerships with industry giants signal a well-funded, high-potential startup.

## Sources
1. [normalcomputing.com](https://normalcomputing.com/)
2. [normalcomputing.com/about](https://normalcomputing.com/about)
3. [linkedin.com/company/normal-computing-corporation](https://www.linkedin.com/company/normal-computing-corporation)
4. [builtin.com/company/normal-computing](https://builtin.com/company/normal-computing)
5. [jobs.ashbyhq.com/normalcomputing](https://jobs.ashbyhq.com/normalcomputing)

## Other roles at Normal Computing Corporation

- [AI Research Resident (Algorithms Codesign)](https://feeny.ai/job/ai-research-resident-algorithms-codesign-normal-computing-corporation-new-york-60jxmxr64wk5) — New York, NY
- [Engineering Manager, Compiler & Runtime](https://feeny.ai/job/engineering-manager-compiler-runtime-normal-computing-corporation-mountain-view-tt9vtnwjygvt) — Mountain View, CA
- [Events & Conferences Specialist](https://feeny.ai/job/events-conferences-specialist-normal-computing-corporation-new-york-3rgsr2f7hkhj) — New York, NY
- [Mechanical Engineer, Hardware Systems](https://feeny.ai/job/mechanical-engineer-hardware-systems-normal-computing-corporation-mountain-view-n9eqr3h1hgbh) — Mountain View, CA
- [Compiler Frontend Engineer](https://feeny.ai/job/compiler-frontend-engineer-normal-computing-corporation-mountain-view-xd4ytzz9zmbz) — Mountain View, CA
- [Firmware Engineer](https://feeny.ai/job/firmware-engineer-normal-computing-corporation-mountain-view-92p63r8rsgdk) — Mountain View, CA
- [TPM Lead](https://feeny.ai/job/tpm-lead-normal-computing-corporation-mountain-view-d92ny63s7jex) — Mountain View, CA
- [Hardware Engineer, DFT](https://feeny.ai/job/hardware-engineer-dft-normal-computing-corporation-mountain-view-xv7mzqfbedsx) — Mountain View, CA
- [Head of Silicon Product Engineering](https://feeny.ai/job/head-of-silicon-product-engineering-normal-computing-corporation-mountain-view-c514zrdswrxf) — Mountain View, CA
- [Hardware Engineer, Performance Modeling](https://feeny.ai/job/hardware-engineer-performance-modeling-normal-computing-corporation-mountain-e9pgdhrbq1cy) — Mountain View, CA