---
title: 'Software Engineer — Computation Kernels and Performance at Arago'
canonical: 'https://feeny.ai/job/software-engineer-computation-kernels-and-performance-arago-paris-swx0mfz1tyz1'
type: 'job'
last_seen: '2026-09-07'
---

# Software Engineer — Computation Kernels and Performance at Arago

- **Company:** Arago
- **Location:** Paris, France
- **Employment:** full-time
- **Work type:** onsite
- **Posted:** 2026-08-20
- **Last confirmed live:** 2026-09-07
- **Apply:** https://jobs.ashbyhq.com/arago/50f8c9e7-b5bb-4c56-bf28-d60ce12ec72c

## Job description

## MEET ARAGO AND THE ARAGONIANS

Arago is an AI and computer hardware company whose mission is to drive the course of history forward. We do so by accelerating breakthroughs at the intersection of AI and semiconductors.

Founded in 2024 by AI researchers and physicists with deep expertise in photonics, electronics, software, mathematics, and machine learning, Arago brings together a lean team of engineers and scientists from the world’s top companies and research labs.

Composed of nine nationalities and operating from hubs in France, North America, and Israel, we believe in great science and fast achievements. Our work is guided by these core principles:

1. Do great things: we deliver work we’re proud to sign our name to.
2. High velocity: speed matters. We move quickly, one step at a time.
3. One unit: we’re all in this together, with relationships grounded in trust, respect, and camaraderie.

Arago is backed by executives from Apple, Arm, Nvidia, Microsoft, and Hugging Face, as well as prominent US and European deeptech venture firms and exited founders.

## WHAT YOU’LL DO

As a Performance Software Engineer, you will be instrumental in building the core computation software that runs on Arago’s custom AI accelerators. Your work will bridge the gap between host systems and proprietary hardware, encompassing everything from a custom on-board kernels to the sophisticated tooling required for real-time debugging. You will be a key player in chip bring-up and the long-term development of high-performance computation primitives and kernels, ensuring our architecture operates with maximum efficiency and deterministic performance.

## REQUIRED SKILLS AND EXPERIENCE

- Bachelor’s, Master’s, or PhD in Computer Science, Computer Engineering, or a related field.
- Strong experience in low-level systems programming using C/C++ and assembly, with excellent understanding of how compiled software maps to machine instructions and hardware behavior.
- Deep familiarity with bare-metal development, including startup code, linker scripts, memory layout, MMIO, interrupts/exceptions, timers, synchronization, and direct peripheral access.
- Strong understanding of computer architecture, including pipelines, caches, memory hierarchies, virtual/physical addressing, atomics, DMA, and performance implications of different access patterns.
- Hands-on experience with RISC-V and/or ARM architectures, instruction sets, calling conventions, ABI concepts, and architecture-specific intrinsics.
- Experience debugging hardware/software interactions using tools such as GDB, JTAG, trace/debug interfaces, simulators, emulators, or FPGA platforms.
- Ability to read hardware specifications, register descriptions, and RTL-level documentation and translate them into robust software implementations.
- Strong performance-analysis and optimization skills, including profiling, disassembly inspection, compiler optimization behavior, and hand-tuned assembly where appropriate.
- Language: English at a proficient level. French is a plus.

## RESPONSIBILITIES

- Develop and optimize low-level software primitives in C/C++, assembly, and architecture-specific intrinsics, primarily for RISC-V and ARM platforms.
- Implement performance-critical kernels, runtime components, hardware abstraction layers, drivers, and firmware operating in bare-metal or highly constrained environments.
- Work closely with hardware architects and RTL/design teams to define and validate hardware-software interfaces, memory maps, register interfaces, interrupts, synchronization mechanisms, and boot flows.
- Analyze and optimize software for latency, throughput, memory footprint, instruction count, and efficient use of processor and accelerator features.
- Bring up and debug software on simulation, emulation, FPGA, and silicon platforms, including low-level hardware/software integration issues.
- Develop validation tests, benchmarks, and diagnostic tools for new processor, DSP, accelerator, and SoC functionality.
- Contribute to architecture decisions around ISA extensions, compiler intrinsics, memory hierarchy, DMA, cache/coherency behavior, and software-visible hardware features.

## PAY AND BENEFITS

- Competitive cash compensation, with final package based on location, experience, and the pay of team members in similar positions.
- Meaningful stock option plan offered at the earliest stage of the company (included in the majority of full time offers).
- Relocation bonus and coverage of moving expenses for relocation within 20 minutes of the company’s location.
- Healthcare coverage (including family-friendly options), pension contributions, professional development support, and 25 days of PTO, in addition to public holidays.
- Ownership of a key technical domain, with significant vertical and/or horizontal growth opportunities, based on performance and individual drive.
- Reimbursement of 50% of the public transport subscription fee.
- A high-paced, multicultural (with 10 nationalities), and engineering-led environment.

## OUR HIRING PROCESS: YOUR JOURNEY TO ARAGO

- Screening Call : Get to know you beyond your CV.
- Technical meeting : Deep dive into your past projects and technical achievements.
- CEO Interview : Assess the fit with the team’s culture and long-term vision.
- Reference Calls: Mandatory calls with your former managers to validate strengths, weaknesses, and work style.
- Technical Assessment: Take-home technical assignment crafted to the role you’re applying for.
- Final Interview : Discuss your technical assignment and address any remaining questions with team members.

## About Arago

## Company Overview
- **One-liner**: Arago builds photonic AI accelerator chips that use lasers instead of transistors to dramatically cut energy consumption while remaining compatible with existing AI software and hardware ecosystems.
- **Entity Type**: Private (Seed stage)
- **Headquarters**: Paris, France
- **Founded**: 2024
- **Founders**: Nicolas Muller (CEO), Eliott Sarrey (CTO), Ambroise Müller (CSO)

## Core Business
- **Primary industry/industries**: Semiconductor hardware, photonic computing, artificial intelligence infrastructure
- **Target customers**: AI model developers, cloud data centers, enterprises deploying large-scale AI workloads (B2B, infrastructure)
- **Mission or purpose**: To overcome the compute and memory ceilings of traditional silicon by leveraging light as a computing principle, delivering 10×–30× reductions in energy consumption for AI workloads.

## Products & Services
- **JEF (codenamed)**: A photonic AI accelerator chip that processes data using photons instead of electrons. It integrates with standard software frameworks (PyTorch, etc.) through the CARLOTA® software stack, abstracts hardware details, and achieves multi-PetaOp/s performance with significantly lower energy and cost per operation. Designed for high-volume AI tasks with n³ complexity.

## Market Standing
- **Valuation/Market Cap**: Not disclosed (private company)
- **Key Metric**: Total funding of **$26.0M** (Seed round closed August 2025)
- **Notable Investors/Partners**: Co-led by **Protagonist**, **Earlybird Venture Capital**, and **Visionaries Tomorrow**, with participation from **Generative IQ**, **C4 Ventures**, and angels including **Bertrand Serlet** (former VP at Apple), **Christophe Frey** (GM at Arm), **Olivier Pomel** (co-founder of Datadog), **Thomas Wolf** (co-founder of Hugging Face), and **Jack Abraham** (co-founder of Exowatt).
- **Growth Signals**: Headcount grew **95.2% year-over-year** to 35 employees (+20 people). operates in 7 countries (France, US, UK, Norway, Israel, Spain, Bulgaria). Technical staff makes up 59% of the team. Actively hiring 16+ roles across hardware, software, and people operations.

## Competitive Advantages
- **Photonic compute core**: Uses light instead of electrons, generating far less heat and enabling 10×–30× lower energy consumption per inference/training task.
- **Full ecosystem compatibility**: The chip is designed to work with existing manufacturing processes, standard AI frameworks (PyTorch), and GPU-like programming models—avoiding the “cold start” problem that plagues most alternative processors.
- **Deterministic architecture**: Achieves high memory-transfer efficiency for pointwise operations (n² complexity) while accelerating tensor-heavy workloads (n³ complexity) at ultra-low power.
- **Backed by deep-tech veterans**: Investors and advisors from Apple, Arm, Nvidia, Microsoft, Hugging Face give credibility and access to semiconductor industry expertise.

## Strategic Focus
- Accelerate product development and commercialisation of the “JEF” processor.
- Grow the team across development sites in Paris, Tel Aviv, and other hubs.
- Deepen business partnerships with AI infrastructure providers and foundries.
- Maintain full software-layer abstraction (CARLOTA®) to ensure seamless adoption by existing AI workflows.

## Why Work Here
- **Culture**: Arago describes itself as a team of “AI engineers and physicists who believe in great science and fast achievements” and seeks “bold jack-of-all-trades who love to ship products quickly” ([arago.inc](https://www.arago.inc/)).
- **Work model**: Roles vary by location and function – some positions are on-site (Paris, Tel Aviv), others offer remote or hybrid arrangements (e.g., Head of People – Remote; Software Engineer – Drivers & Virtualization – Remote or Hybrid; Digital IC Backend Design Engineer – On-site) ([Built In](https://builtin.com/company/arago-inc/jobs)).
- **Growth trajectory**: A fast-scaling startup (95% YoY headcount increase) with a mission to redefine AI hardware – ideal for engineers and scientists who want to work on cutting-edge photonics, hardware design, and AI software.
- **Team composition**: Highly technical, with 59% of staff in engineering and science roles, and alumni from top research labs and companies like AMD, Mobileye, and EssilorLuxottica.

## Sources
1. [arago.inc](https://www.arago.inc/)
2. [LinkedIn – Arago Inc](https://www.linkedin.com/company/aragoinc)
3. [Tech.eu – Arago raises $26M](https://tech.eu/2025/07/08/arago-raises-26m-to-slash-ai-energy-consumption-with-breakthrough-photonic-chip/)
4. [Built In – Arago Inc Jobs](https://builtin.com/company/arago-inc/jobs)
5. [Ashby – Arago Careers](https://jobs.ashbyhq.com/arago)

## Other roles at Arago

- [Talent Acquisition (France)](https://feeny.ai/job/talent-acquisition-france-arago-paris-gx6r2ptzp4x0) — Paris, France
- [Senior Mixed-Signal Verification Engineer](https://feeny.ai/job/senior-mixed-signal-verification-engineer-arago-paris-27w2w62mgcwz) — Paris, France
- [Senior Hardware Design Engineer](https://feeny.ai/job/senior-hardware-design-engineer-arago-paris-3qaxnnypq9g3) — Paris, France
- [Mixed-Signal IC Design Engineer](https://feeny.ai/job/mixed-signal-ic-design-engineer-arago-paris-rr1jk8q288v5) — Paris, France
- [Architecture Modeling Engineer](https://feeny.ai/job/architecture-modeling-engineer-arago-paris-fapf8vvzb1ph) — Paris, France
- [SW Team Lead](https://feeny.ai/job/sw-team-lead-arago-paris-rrksrjj9qh9t) — Paris, France
- [ML Systems Engineer — Inference Acceleration](https://feeny.ai/job/ml-systems-engineer-inference-acceleration-arago-paris-hv83wjsxczfd) — Paris, France
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