---
title: 'Sr. Staff Design Verification Engineer at d-Matrix'
canonical: 'https://feeny.ai/job/sr-staff-design-verification-engineer-d-matrix-santa-clara-nqrp3cg1fz56'
type: 'job'
last_seen: '2026-10-16'
---

# Sr. Staff Design Verification Engineer at d-Matrix

- **Company:** d-Matrix
- **Location:** Santa Clara, CA
- **Compensation:** $175k–$265k
- **Employment:** full-time
- **Work type:** hybrid
- **Posted:** 2025-04-03
- **Last confirmed live:** 2026-10-16
- **Apply:** https://jobs.ashbyhq.com/d-matrix/9c301105-7338-4375-8286-59b1d649fd44/application

**Skills:** SystemVerilog, UVM, OVM, ASIC-SoC Design Verification, SoC Verification, Tape-out, C, C++, SystemC

> The Senior Design Verification Engineer will lead SoC verification cycles from architecture to tape-out, utilizing SystemVerilog and UVM/OVM methodologies. This role involves hands-on ASIC-SoC design verification testing and debugging within a fast-paced AI hardware innovation environment.

## Job description

At d-Matrix, we are focused on unleashing the potential of generative AI to power the transformation of technology. We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible. Our culture is one of respect and collaboration. We value humility and believe in direct communication. Our team is inclusive, and our differing perspectives allow for better solutions. We are seeking individuals passionate about tackling challenges and are driven by execution.  Ready to come find your playground? Together, we can help shape the endless possibilities of AI.

## Role Overview

d-Matrix is building a company and culture designed to last — one grounded in transparency, inclusiveness, and intellectual honesty, where continuous learning is part of the job. We've built the industry's first highly programmable in-memory computing architecture, applicable across a broad range of applications from cloud to edge. In this role, you'll work on a groundbreaking architecture alongside a highly experienced team that has a proven track record of building successful businesses. This is a unique opportunity to help shape a company at an early stage and grow into a future leader in an industry poised for global impact.

## What You Will Do

- Develop and execute verification plans across the SoC/IP verification cycle, from architecture definition through tape-out and silicon bring-up
- Build and maintain UVM/OVM-based verification environments for complex ASIC/SoC designs
- Write and debug SystemVerilog testbenches, leveraging randomization, functional coverage, and assertion-based methodologies
- Drive root-cause analysis and debug of verification failures in close collaboration with design and architecture teams
- Define and track coverage closure goals to ensure comprehensive verification sign-off
- Partner cross-functionally with design, architecture, and physical design teams to align verification strategy with tape-out schedules
- Contribute to the evolution of verification methodology and infrastructure to support next-generation in-memory computing architectures

## What You Will Bring

- BS in Electrical Engineering, Computer Science, or a related field with 12+ years of industry experience (MS preferred with 7+ years)
- Experience across the full SoC/IP verification cycle — from architecture through tape-out and bring-up
- Hands-on ASIC/SoC design verification test development and debug experience
- Fluency with SystemVerilog (randomization, constraints, coverage, assertions) and verification methodologies such as UVM/OVM/VMM
- Strong problem-solving skills and a passion for tackling complex technical challenges, particularly in the AI domain

## Preferred Qualifications

- Experience with C/C++ and SystemC
- Track record leading the creation and implementation of multiple SoC verification environments and driving tape-out efforts

## Equal Opportunity Employment Policy

d-Matrix is proud to be an equal opportunity workplace and affirmative action employer. We’re committed to fostering an inclusive environment where everyone feels welcomed and empowered to do their best work. We hire the best talent for our teams, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. Our focus is on hiring teammates with humble expertise, kindness, dedication and a willingness to embrace challenges and learn together every day. d-Matrix does not accept resumes or candidate submissions from external agencies. We appreciate the interest and effort of recruitment firms, but we kindly request that individual interested in opportunities with d-Matrix apply directly through our official channels. This approach allows us to streamline our hiring processes and maintain a consistent and fair evaluation of al applicants. Thank you for your understanding and cooperation.

## About d-Matrix

## Company Overview
- **One-liner**: d-Matrix is building ultra-low latency, memory-centric AI inference hardware and software platforms for datacenter-scale generative AI workloads.
- **Entity Type**: Private (Series C, total raised ~$429M–$450M per conflicting reports)
- **Headquarters**: Santa Clara, California, USA
- **Founded**: 2019
- **Founders**: Sid Sheth (CEO) & Sudeep Bhoja (CTO / Founder)

## Core Business
- **Primary industries**: AI infrastructure, semiconductor / hardware acceleration, datacenter compute
- **Target customers**: Cloud providers, enterprises running large-scale generative AI inference (B2B)
- **Mission / purpose**: To transform AI from unsustainable to attainable by breaking through limits of latency, cost, and energy in inference.

## Products & Services
- **Corsair™** – AI inference accelerator platform (PCIe form factor, chiplet-based, 3D stacked DRAM) purpose-built for the decode phase of disaggregated inference. Works alongside GPUs for low-latency interactive AI.
- **JetStream™** – Purpose-built I/O accelerator for AI inference (networking fabric to scale accelerator-to-accelerator communication).
- **Aviator** – Software stack that orchestrates and optimizes inference workloads on d-Matrix hardware.
- **SquadRack™** – Industry’s first rack-scale, disaggregated standards-based solution for AI inference, built with infrastructure partners.

## Market Standing
- **Valuation**: Not publicly disclosed (private company)
- **Key metric**: Total funding – $429M (per CB Insights) or $450M (per company blog after $275M Series C). Series C announced in late 2025 / early 2026.
- **Notable investors**: Temasek, M12 (Microsoft’s venture arm), Playground Global, Nautilus Venture Partners, Industry Ventures, Mirae Asset Financial Group, Triatomic Capital, Bullhound Capital.
- **Growth signals**:
  - Corsair entered full production in June 2026.
  - Won “AI Processor Innovation Award” from AI Breakthrough in June 2026.
  - Filed 21+ patents in parallel computing, neural networks, NLP.
  - Opened engineering offices in Santa Clara, Toronto, Bengaluru, Sydney, and Belgrade – global expansion underway.

## Competitive Advantages
- **Memory-centric compute architecture (3DIMC™)** that eliminates latency bottlenecks caused by traditional memory-bound AI inference.
- Chiplet-based design enables scaling to 100B+ parameter models in a PCIe form factor.
- Disaggregated, standards-based rack-scale approach (SquadRack) that integrates seamlessly with existing datacenter infrastructure.
- Team of industry veterans who have shipped over 100 million chips and generated $5B+ in prior revenue.

## Strategic Focus
- Scaling production of Corsair to meet customer demand for agentic AI workloads (voice agents, coding tools, real-time inference).
- Building a heterogeneous compute ecosystem where d-Matrix accelerators complement GPUs rather than replace them.
- Expanding software stack (Aviator) and networking (JetStream) to deliver full-stack inference solutions.

## Why Work Here
- **Culture**: “Round pegs in square holes” – builders, innovators, dreamers. Emphasis on humility, direct communication, and collaboration.
- **Work model**: Remote & hybrid working model (global offices in Silicon Valley, Sydney, Bengaluru, Toronto, Belgrade).
- **Benefits**: Competitive pay and equity, health care, flexible time-off, paid paternity leave, 401k, on-site fitness centers, free food/snacks, peer coaching & development, team-building activities.
- **Engineering environment**: Work with world-leading engineers and researchers on cutting-edge AI hardware/software. Opportunity to shape the future of AI inference infrastructure.

## Sources
1. [d-matrix.ai – Homepage](https://www.d-matrix.ai/)
2. [d-matrix.ai – About / Leadership](https://www.d-matrix.ai/about/)
3. [d-matrix.ai – Careers](https://www.d-matrix.ai/careers/)
4. [d-matrix.ai – Corsair Production & AI Breakthrough Award](https://www.d-matrix.ai/announcements/d-matrix-corsair-ai-inference-platform-enters-full-production-to-meet-customer-demand/)
5. [CB Insights – d-Matrix Company Profile](https://www.cbinsights.com/company/d-matrix)
6. [Ashby – d-Matrix Jobs](https://jobs.ashbyhq.com/d-matrix)

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