---
title: 'Sr. Staff Physical Design Engineer at Lightmatter'
canonical: 'https://feeny.ai/job/sr-staff-physical-design-engineer-lightmatter-mountain-view-2n9d77jzff7r'
type: 'job'
last_seen: '2026-09-04'
---

# Sr. Staff Physical Design Engineer at Lightmatter

- **Company:** Lightmatter
- **Location:** Mountain View, CA
- **Compensation:** $220k–$270k
- **Posted:** 2026-01-07
- **Last confirmed live:** 2026-09-04
- **Apply:** https://boards.greenhouse.io/lightmatter/jobs/5057578008?gh_jid=5057578008

## Job description

Lightmatter is leading the revolution in AI data center infrastructure, enabling the next giant leaps in human progress. The company invented the world’s first 3D-stacked photonics engine, Passage™, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads.

Lightmatter raised $400 million in its Series D round, reaching a valuation of $4.4 billion. We will continue to accelerate the development of data center photonics and grow every department at Lightmatter!

If you're passionate about tackling complex challenges, making an impact, and being an expert in your craft, join our team of brilliant scientists, engineers, and accomplished industry leaders.

Lightmatter is (re)inventing the future of computing with light!

We are seeking a highly skilled Senior Physical Design Engineer to work on the implementation of complex digital blocks. In this role, you will leverage your expertise in advanced process nodes (3nm) to drive timing closure, power integrity, and physical verification for high-performance ASICs. Beyond standard digital flows, you will have the unique opportunity. To work alongside a team of world-class scientists and engineers in defining how the system will be optimized and trailblaze problems that are new to the photonics industry! If your passion is innovation, solving challenging technical problems and doing impactful work you should join our team!

## Responsibilities

- Implement digital blocks in advanced tech nodes from synthesis through physical verification, using industry standard tools and flows
- Drive fullchip STA signoff, review constraints, debug timing reports and implement ecos
- Drive power analysis and optimization while balancing area and performance trade-offs
- Drive full chip floor planning, IO placement and clock distribution
- Understand clock details and be able to customize clock implementation for functional and test clocks
- Debug and clean up DRC/LVS
- Functional and timing ECO implementation
- Work with EDA companies to resolve any tool issues
- Write TCL, Python, or Shell scripts to automate flow or customize existing flows

## Qualifications

- Bachelor’s in Electrical Engineering or Computer Engineering
- 12+ years of industry experience working as a Physical Design Engineer
- Must have completed blocks or top level physical design for large ASICs or mixed signal chips that taped out
- Thorough knowledge of timing closure, LVS/DRC closure
- Experience in TCL and Python (or other scripting languages)
- Strong teamwork skills with the ability to collaborate with multiple functional teams across a variety of fields
- Ability to react to change and thrive in a fast paced environment

## Preferred Qualifications

- Masters Electrical Engineering or Computer Engineering with 8 years of industry experience
- Hands-on experience with Cadence tools
- Tape-out experience 3nm designs
- Be willing to do manual layouts as well as willingness to learn and do silicon photonics layout
- EM/IR analysis using standard industry signoff tools

We offer competitive compensation. The base salary range for this role determined based on location, experience, educational background, and market data.

Salary Range: total compensation goes beyond base salary, it also includes a new hire equity grant, annual performance-based equity, and other rewards that recognize your impact and contribution. $220,000—$270,000 USD

## Benefits

- Comprehensive Health Care Plan (Medical, Dental & Vision)
- Retirement Savings Matching Program
- Life Insurance (Basic, Voluntary & AD&D)
- Generous Time Off (Vacation, Sick & Public Holidays)
- Paid Family Leave
- Short Term & Long Term Disability
- Training & Development
- Commuter Benefits
- Flexible, hybrid workplace model
- Equity grants (applicable to full-time employees)

Benefits eligibility may vary depending on your employment status and location. Lightmatter recruits, employs, trains, compensates, and promotes regardless of race, religion, color, national origin, sex, disability, age, veteran status, and other protected status as required by applicable law.

Export Control

Candidates should have capacity to comply with the federally mandated requirements of U.S. export control laws.

## About Lightmatter

## Company Overview
- **One-liner**: Lightmatter builds photonic interconnects and computing infrastructure to eliminate bandwidth bottlenecks in AI and high-performance computing, enabling the next era of AI scaling.
- **Entity Type**: Private (Series D, $850M total funding)
- **Headquarters**: Mountain View, California, USA
- **Founded**: 2017
- **Founders**: Nicholas Harris, PhD (CEO), Darius Bunandar, PhD (Head of Machine Learning), and a third co-founder (Chief Scientist)

## Core Business
- **Primary industry**: Silicon Photonics / AI Infrastructure / Semiconductor
- **Target customers**: Hyperscale data center operators, AI labs (training frontier models), cloud service providers, and enterprise AI teams
- **Mission or purpose**: To make computers keep getting better by using light instead of electricity for data movement, solving the fundamental bandwidth bottleneck that limits AI scaling.

## Products & Services
- **Passage™ Platform**: A family of 3D-stacked silicon photonics interconnects (NPO, OBO, 2D/3D CPO, 3D interposers) that provide "Edgeless I/O"—unlimited bandwidth scaling for AI supercomputers. Key variants include:
  - **Passage M1000 EVK**: Rack-level 3D photonic interposer delivering 114 Tbps across a 4,000 mm² footprint.
  - **Passage L200**: Designed for frontier-scale training, supporting 32–64 Tbps aggregate bandwidth via co-packaged optics (112G PAM4).
  - **Passage L20**: Accelerates optics integration with 12.8 Tbps aggregate bandwidth and 4x pluggable density.
  - **Passage EVK100**: High-bandwidth bidirectional link at 3.2 Tbps per fiber, 1.9 pJ/bit.
  - **Passage EVK50**: 16-wavelength bidirectional link at 800 Gbps per fiber, 2.6 pJ/bit.
- **Guide® Light Engines**: Very Large Scale Photonics technology—a universal light source (hundreds of lasers and photonics components on a single chip) designed to power co-packaged optics across the entire photonics industry.

## Market Standing
- **Valuation**: $4.4 billion (as of October 2024)
- **Key Metric**: $850M total funding raised
- **Notable Investors/Partners**: TSMC, GlobalFoundries, Tower Semiconductor (manufacturing partners); Amkor, ASE (packaging partners); NVIDIA (joined NVLink Fusion ecosystem); standards bodies including Ultra Ethernet, UALink, JEDEC, OIF, IEEE, OCP, and the Advanced Photonics Coalition.
- **Growth Signals**: First-mover in category-defining photonic interconnects; multiple generations of production-ready technology (not vaporware); reference platforms in customer hands; 100,000+ GPU cluster capability; world-first 16-wavelength bidirectional optical DWDM link on standard single-mode fiber (8x leap in bandwidth density); partnerships with top foundries ensure high-volume manufacturing.

## Competitive Advantages
- **Edgeless I/O architecture**: Eliminates the physical chip-perimeter constraint that limits electrical interconnects, enabling bandwidth to scale without bound.
- **Fundamentally better physics**: Photons travel without resistive loss, cross paths without interference, and carry multiple signals on a single fiber—far more efficient than electrons.
- **Deep vertical integration**: From photonic chip design to light engines (Guide) to complete interconnect platforms (Passage), with proprietary 3D stacking technology.
- **Decade-scale roadmap**: Continued bandwidth scaling (114 Tbps today, 1+ Pbps tomorrow) with production-ready silicon validated at scale.
- **Ecosystem lock-in**: Standards body leadership and partnerships with NVIDIA, TSMC, and hyperscalers create high switching costs.

## Strategic Focus
- **Scale AI infrastructure**: Enable 100,000+ GPU clusters for trillion-parameter models, solving the interconnect bottleneck that currently strands hundreds of millions in compute capacity.
- **Productize photonics**: Move from reference platforms to volume production across Passage and Guide families, targeting both training and inference workloads.
- **Expand ecosystem**: Deepen partnerships with hyperscalers, AI labs, and chipmakers (e.g., NVIDIA NVLink Fusion) to make photonic interconnects the default for next-gen data centers.
- **Hire across all functions**: Actively growing engineering, research, sales, and operations teams to scale the company.

## Why Work Here
- **Mission-driven impact**: Work at the intersection of photonics, AI, and semiconductor engineering to solve the most critical bottleneck in AI—data movement. Your work directly enables frontier models and trillion-parameter training.
- **World-class team**: Colleagues from MIT, Caltech, Stanford, and UC Berkeley; published in Nature, Science, ISSCC, ISCA; 100+ patents; team members contributed to black hole simulation software for the Academy Award-winning movie *Interstellar*.
- **Cutting-edge technology**: Not research, not vaporware—multiple generations of production-ready photonic chips in customer hands, with a decade-scale roadmap.
- **Locations**: Mountain View, CA (HQ); Boston, MA; Hsinchu, Taiwan; Toronto, Canada.
- **Benefits**: 401(k), generous vacation policy and holidays, commuter benefits, happy hours, and a strong learning culture (peer-to-peer knowledge sharing across electronics, photonics, machine learning, and more).
- **Culture**: "We are one Lightmatter"—collaborative, cross-disciplinary, and focused on solving hard problems at scale.

## Sources
1. [lightmatter.co/about](https://lightmatter.co/about/)
2. [lightmatter.co](https://lightmatter.co/)
3. [lightmatter.co/people/careers](https://lightmatter.co/people/careers/)
4. [lightmatter.co/people](https://lightmatter.co/people/)
5. [linkedin.com/company/lightmatter](https://www.linkedin.com/company/lightmatter)

## Other roles at Lightmatter

- [Staff/Sr Staff Electro-Optic Link Codesign Engineer](https://feeny.ai/job/staff-sr-staff-electro-optic-link-codesign-engineer-lightmatter-boston-4ddybajp6gbf) — Boston, MA / Mountain View, CA / Toronto, Canada
- [Senior Account Manager](https://feeny.ai/job/senior-account-manager-lightmatter-mountain-view-zcefyvftztp2) — Mountain View, CA
- [Staff /Sr Staff Laser Module & Systems Characterization Engineer](https://feeny.ai/job/staff-sr-staff-laser-module-systems-characterization-engineer-lightmatter-1wcg5m40jtae) — Mountain View, CA
- [Package Layout Engineer](https://feeny.ai/job/package-layout-engineer-lightmatter-mountain-view-7jbh4w7py93p) — Mountain View, CA
- [Signal Integrity Engineer](https://feeny.ai/job/signal-integrity-engineer-lightmatter-mountain-view-ayx6663v9ev9) — Mountain View, CA
- [Power Integrity Engineer](https://feeny.ai/job/power-integrity-engineer-lightmatter-mountain-view-vzjq87yvgcn3) — Mountain View, CA
- [Packaging Architect](https://feeny.ai/job/packaging-architect-lightmatter-mountain-view-z0qq40ppzjn6) — Mountain View, CA
- [Mixed-Signal Validation Engineer](https://feeny.ai/job/mixed-signal-validation-engineer-lightmatter-mountain-view-x1nsj4wg7qdp) — Mountain View, CA
- [Principal Field Application Engineer](https://feeny.ai/job/principal-field-application-engineer-lightmatter-mountain-view-4s0cgx1wcpe0) — Mountain View, CA
- [System Mechanical Design Engineer](https://feeny.ai/job/system-mechanical-design-engineer-lightmatter-mountain-view-4xa67r9cz2gj) — Mountain View, CA