---
title: 'Sr Staff/ Staff Engineer: Physical Design at Mythic'
canonical: 'https://feeny.ai/job/sr-staff-staff-engineer-physical-design-mythic-bengaluru-f8aaf3kzjkh4'
type: 'job'
last_seen: '2026-09-07'
---

# Sr Staff/ Staff Engineer: Physical Design at Mythic

- **Company:** Mythic
- **Location:** Bengaluru, India
- **Employment:** full-time
- **Work type:** onsite
- **Posted:** 2025-12-16
- **Last confirmed live:** 2026-09-07
- **Apply:** https://jobs.lever.co/mythic-ai.com/583fdf07-b48b-43d2-8a93-b1005229bfdc

## Job description

About us: Mythic has developed a unified hardware and software platform featuring its unique Mythic Analog Compute Engine (Mythic ACE™) to deliver revolutionary power, cost, and performance that shatters digital barriers preventing AI innovation at the edge. Mythic's unique technology makes it much easier and more affordable to deploy powerful AI solutions, from the data center to the edge device. The company has raised over USD 125M in a recent funding round and has offices in Palo Alto (CA, USA), Austin (TX, USA), and Bangalore (Karnataka, India).

About This Role: Mythic is a fast-paced AI startup seeking passionate engineers who thrive in dynamic environments and embrace broad, flexible roles. We are looking for hands-on Physical Design Engineers eager to push boundaries in advanced technology nodes. This role is for Mythic’s Bangalore design center, but as part of our global workforce across geographies, you will drive innovation by working closely with the RTL and Technology teams and contribute to producing high-quality designs through first-pass silicon success. With end-to-end ownership, you’ll tackle challenges in physical design with a focus on scalability, speed of execution, and efficiency in a fast-moving AI hardware landscape, with a strong emphasis on analog IP integration. This role is for experienced, seasoned engineers who are well-versed in PD flows, with a proven record of execution, and who are driven to push the envelope and find innovative solutions to complex implementation challenges at both the subsystem and chip levels.

Here is what you will do:

- Participate in the development of Physical Design (PD) methodologies across the RTL-to-GDSII flow using industry-standard tools (Cadence, Synopsys, Mentor).
- Perform lead level hands-on work in one or more areas including Synthesis, Formal Equivalence, Place & Route (PnR), Static Timing Analysis (STA), DRC/LVS/IR/EM Signoff at both module and top level.
- Take full ownership of the physical design process at the module level and provide support in top-level integration, collaborating closely with RTL designers, DFT teams, and fabrication partners.
- Provide technical mentorship, guiding team members and managing PD team interactions to ensure successful SoC implementation.
- Drive PPA optimization, including low-power clock tree design for high-performance systems, and achieve timing closure across multiple corners and use cases.
- Champion an automation-first approach, developing methodologies in TCL, PERL, or Python to significantly improve team efficiency.

Here is the background we hope you have:

- [B.Tech/M.Tech/PhD](http://B.Tech/M.Tech/PhD) in Electrical Engineering (EE) or Electronics & Communication Engineering (ECE).
- 10+ years of experience in the Physical Design domain.
- Deep expertise in one or more areas (Synthesis, Formal Equivalence, PnR, STA, DRC/LVS/IR/EM signoff) with strong working knowledge of the entire PD flow.
- Proven track record of successful tapeouts for multi-million gate, multi-hierarchy designs at advanced nanometer technology nodes.
- Solid understanding and preferably hands-on experience in low-power design and implementation strategies.
- Strong background in automation of PD methodologies using TCL, PERL, or Python.
- Willingness to expand beyond core expertise, with a team-oriented, can-do attitude and commitment to mastering the full RTL-to-GDSII flow.

The following would be nice to have, but is not required:

- Knowledge of chiplet-based design limitations and their impact on physical design.
- Experience in Sub-10nm designs
- Familiarity and hands-on experience with Cadence toolsets.

## About Mythic

## Company Overview
- **One-liner**: Mythic is a semiconductor company developing analog compute-in-memory (CIM) processing units that deliver up to 100x greater energy efficiency for AI inference at the edge, in automotive, and in the data center.
- **Entity Type**: Private (Series C; total funding $290.4M as of 2021)
- **Headquarters**: Austin, Texas, United States (with offices in Silicon Valley, Vancouver, and Bangalore)
- **Founded**: 2012
- **Founders**: Mike Henry, Dave Fick, and Laura Fick (co‑founder and Chief Analog Compute Architect)

## Core Business
- **Primary industry**: Semiconductor manufacturing – AI hardware accelerators
- **Target customers**: B2B – OEMs and system integrators in automotive, defense, robotics, industrial IoT, and enterprise data centers
- **Mission statement**: “Enable a new era of AI performance and innovation by making it easier and more affordable to deploy powerful AI solutions, from the data center to the edge device.”

## Products & Services
- **Mythic APU (Analog Processing Unit)**: A chip built on analog compute-in-memory architecture that stores AI model weights inside flash memory and performs computation directly at the source, eliminating the energy wasted by moving data between processor and memory. Delivers up to 100x system‑level performance‑per‑watt‑per‑dollar vs. conventional digital/GPU inference. Available today for edge and enterprise deployments.
- **Mythic Software Platform**: A unified hardware/software stack that simplifies deploying AI models on the APU, including compilers, runtimes, and model optimization tools.

## Market Standing
- **Valuation / Market Cap**: Not disclosed (private company)
- **Key Metric**: $14.1M annual revenue (2026 estimate); $290.4M total funding raised across 8 rounds, including a $70M Series C in 2021 led by Hewlett Packard Enterprise and BlackRock, with earlier rounds led by SBVA (SoftBank) and Valor Equity Partners.
- **Notable Investors / Partners**: BlackRock, Hewlett Packard Enterprise, Valor Equity Partners, SBVA (SoftBank). The team includes veterans from NVIDIA, ON Semiconductor, and Luminar.
- **Growth Signals**: 
  - Headcount grew 46.4% YoY (to ~42 employees as of 2026).
  - Acquired Videantis (Jan 2026), a German AI processor company whose silicon is already running in 30 million production vehicles, giving Mythic an instant automotive ADAS footprint.
  - Active job postings for 18 open roles across hardware, software, and corporate functions.
  - Expanding into India with a VP of Mythic India and a Bangalore office.

## Competitive Advantages
- **Analog Compute-in-Memory**: Eliminates the Von Neumann bottleneck by computing in analog directly where data is stored, achieving up to 100x better energy efficiency than traditional digital or GPU inference.
- **Automotive‑Grade from Day One**: The Videantis acquisition provides proven, scalable ADAS/AD platforms already deployed in millions of vehicles, with customers like Bosch, Continental, and Valeo.
- **Proven Silicon**: Mythic’s APU is operational and available today, not theoretical.
- **Deep Talent Pool**: Team includes experts from NVIDIA, ON Semiconductor, Cisco, and leading chip companies, with a strong mix of analog, digital, and AI expertise.

## Strategic Focus
- **Scale the Automotive Business**: Leverage the Videantis acquisition to become a major player in automotive ADAS and autonomous driving compute.
- **Expand into Defense and Industrial**: Target high‑reliability, low‑power AI applications in defense, robotics, and industrial IoT.
- **Data Center Edge**: Deliver efficient inference for enterprise AI workloads that cannot afford the power cost of traditional GPUs.
- **Grow Global Team**: Build out software, hardware, and field engineering teams, particularly in India and the U.S.

## Why Work Here
- **Impactful Mission**: Work at the frontier of AI hardware, solving the fundamental energy efficiency problem in AI compute.
- **Collaborative, Results‑Focused Culture**: Mythic describes itself as a “collaborative, results‑focused team where everyone has a chance to contribute and lead.”
- **Rapid Growth**: 46% YoY headcount growth and a recently acquired company signal strong momentum and career growth opportunities.
- **Diverse Technical Challenges**: Roles span chip design, compiler engineering, AI algorithms, firmware, and systems engineering.
- **Hybrid/Office Policy**: Some roles are listed as hybrid (e.g., Palo Alto, Austin) or fully on‑site; exact policy varies by position. The company has offices in Austin, Silicon Valley, and Vancouver, with a growing presence in Bangalore.
- **Notable Perks**: Not explicitly stated, but working at a well‑funded, pre‑IPO startup in the AI hardware space typically offers equity, competitive compensation, and the chance to shape the future of computing.

## Sources
1. [Mythic Official Website](https://www.mythic.ai/)
2. [Mythic Careers Page (Lever)](https://jobs.lever.co/mythic-ai.com)
3. [Mythic Team Page](https://www.mythic.ai/company)
4. [Mythic LinkedIn Company Profile](https://www.linkedin.com/company/mythic-ai)
5. [Mythic Join Us Page](https://mythic.ai/join-us/)

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