--- title: 'Staff/Senior Staff Physical Design Engineer (Technical Lead) at EnCharge AI' canonical: 'https://feeny.ai/job/staff-senior-staff-physical-design-engineer-technical-lead-encharge-ai-cmnb630xcw9d' type: 'job' last_seen: '2026-09-12' --- # Staff/Senior Staff Physical Design Engineer (Technical Lead) at EnCharge AI - **Company:** EnCharge AI - **Location:** Bangalore OR in, India - **Work type:** remote - **Posted:** 2026-02-20 - **Last confirmed live:** 2026-09-12 - **Apply:** https://job-boards.greenhouse.io/enchargeai36/jobs/4140565009 ## Job description EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Job Title: Staff/Senior Staff Physical Design Engineer (Technical Lead) Experience: Staff 8-10 years Senior Staff 11-13 years Location:  Bangalore Hybrid/Remote or Remote in India ## The Role We are seeking a high-impact Staff/Senior Staff Physical Design Engineer to serve as a Technical Lead for our next-generation silicon products. This is a "player-coach" role designed for a versatile expert who is equally comfortable architecting a  convergence strategy as they are mentoring a small team of engineers. You will own the physical delivery of a major sub-chip or complex block, pushing the absolute limits of PPA (Power, Performance, Area). As a Staff/Senior Staff lead, you are expected to be the "anchor" of the project—assertive in your decision-making, highly analytical in your debugging, and adept at managing stakeholders to ensure we hit our tape-out milestones without compromise. ## Key Responsibilities - Technical Leadership: Lead a small team of PD engineers, providing technical direction, workload management, and architectural oversight for a sub-chip or partition. SOC clocking , FEV/VCLP specialized skills are preferred. - Complex Block/Sub-chip Ownership: Take personal hands-on ownership of the most critical, high-congestion, or timing-critical blocks in the design. - Timing & PPA Strategy: Act as the primary architect for PD convergence. Derive and implement custom "PPA recipes" that go beyond standard vendor flows to meet aggressive targets. - Advanced Automation: Drive efficiency across the team by developing sophisticated Tcl and Python scripts for flow automation, data mining, and sign-off verification. - Stakeholder Management: Build strong rapport with RTL, DFT, and Synthesis teams. Effectively communicate risks and push for "left-shift" optimizations to safeguard the project schedule. - Sign-off Accountability: Ensure the sub-chip meets all gold-standard sign-off criteria, including STA, EM/IR (Voltus/Apache), and Physical Verification (Pegasus/Calibre). Technical Requirements Category Requirement ## Experience Staff 8-10 years Senior Staff 11-13 years PD experience with a proven track record of multiple successful lead-level tape-outs. Tool Mastery Expert-level proficiency in Cadence Innovus/Tempus Timing Convergence Deep expertise in Static Timing Analysis (STA), including complex clocking, multi-corner sign-off, and crosstalk closure. PPA Optimization Demonstrated ability to squeeze performance out of advanced nodes (7nm, 5nm, or below) via custom floorplanning, CTS strategies and other convergence approaches. Automation Advanced scripting in Tcl and Python to build scalable, repeatable design methodologies. Leadership & Soft Skills - High Workability & Assertiveness: You are a proactive communicator who can hold ground on technical requirements while remaining collaborative and solution-oriented. - Analytical Problem Solver: You don't just identify violations; you analyze the "why" and derive a systemic fix that prevents the issue from recurring. - Driven & Versatile: You possess the "Senior Staff" mindset—ready to jump into any part of the flow (from floorplan to GDSII) to unblock the team and meet the schedule. - Mentorship: Passionate about raising the technical bar for the engineers reporting to you. ## About EnCharge AI ## Company Overview - **One-liner**: EnCharge AI develops analog in-memory computing hardware and software to deliver high-efficiency, low-cost AI inference from edge devices to cloud data centers. - **Entity Type**: Private (Series B – II stage) - **Headquarters**: Santa Clara, California, United States - **Founded**: 2022 - **Founders**: Naveen Verma, Ph.D. (CEO) and Kailash Gopalakrishnan, Ph.D. (CTO) ## Core Business - **Primary industry**: AI semiconductor hardware and embedded software products - **Target customers**: B2B – enterprises deploying AI at scale, edge-device manufacturers, cloud service providers, and defense/industrial sectors - **Mission**: Democratize advanced AI by enabling deployment beyond cloud infrastructure to local servers and mobile devices, while slashing costs and environmental impact ## Products & Services - **Analog In-Memory Computing GPUs & Digital AI Accelerators**: Custom silicon (chiplets, ASICs) and standard-form-factor PCIe cards that perform AI inference using analog computation for orders-of-magnitude better energy efficiency and compute density. - **Software Stack**: Seamless orchestration layer that supports on-device and cloud deployment, enabling model portability, quantization, and compiler optimizations across EnCharge’s hardware. - **Edge-to-Cloud Platforms**: Integrated solutions for power-, space-, and cost-constrained environments, covering autonomous systems, smart devices, data center inference, and private on-premise AI. ## Market Standing - **Valuation / Market Cap**: Not publicly disclosed - **Key Metrics**: Annual Revenue ~$10M (LinkedIn estimate) | Total Funding $162.9M - **Notable Investors & Partners**: Tiger Global Management (led $100M Series B, Mar 2025), Anzu Partners (led $21.7M Series A, Dec 2022), DARPA ($18.6M grant, Mar 2024), and others including corporate/institutional backers. - **Growth Signals**: - 58.6% YoY headcount growth (75 employees, as of mid-2025) - 39 active job openings spanning hardware, compiler, and AI architecture roles - 150+ patents granted, 300+ technical publications - Talent inflows from Intel, IBM, Cerebras, AMD, Meta, Microsoft ## Competitive Advantages - **Analog In-Memory Computing Moa**t: A proprietary compute architecture that uses charge-domain analog circuits, validated silicon, and leverages existing semiconductor supply chains. - **Record Efficiency**: Claims 20× higher TOPS/W, 9× higher compute density (TOPS/mm²), 10× lower total cost of ownership, and 100× lower CO₂ emissions compared to leading cloud/GPU alternatives. - **Deep IP Portfolio**: 150+ granted patents and 300+ publications from 20+ years of foundational research by the founding team (Princeton, IBM, etc.). - **End-to-End Solution**: Full-stack hardware and software (compiler, quantization, runtime) designed for seamless edge-to-cloud orchestration without vendor lock-in. ## Strategic Focus - Scale production and customer deployments of their analog in-memory compute chips for high-volume edge and data center inference. - Expand software ecosystem to support mainstream AI frameworks (PyTorch, TensorFlow, ONNX) and enable easy drop-in replacement for existing GPU-accelerated workloads. - Deepen partnerships with defense (DARPA) and enterprise cloud providers, emphasizing data privacy, security, and sustainability. - Double down on sustainability messaging (100× lower CO₂) to meet ESG mandates in enterprise AI procurement. ## Why Work Here - **Mission-Driven Impact**: Opportunity to make AI accessible to the “99%” by dramatically reducing energy and cost barriers. Work is cited as a “once-in-a-lifetime” chance by leadership. - **World-Class Team**: Colleagues include industry luminaries from Princeton, IBM, and top semiconductor houses; 57% of staff are in technical roles (engineering, research, compiler). - **Culture of Collaboration & Innovation**: The careers page highlights integrity, growth, and collaborative problem-solving in a fast-paced startup environment. - **Comprehensive Rewards**: Benefits package includes typical startup perks; equity likely offered given funding stage. - **Work Policy**: Hybrid presence indicated by offices in Santa Clara, Canada, Germany, Norway, South Korea, and India. Remote flexibility likely for some roles. - **Active Hiring**: 39 open positions across DFT, physical design, compiler engineering, and NPU architecture – strong signal of scaling and technical investment. ## Sources 1. [EnCharge AI Official Website](https://www.enchargeai.com/) 2. [EnCharge AI Careers Page](https://www.enchargeai.com/careers) 3. [EnCharge AI About Us (Leadership & Founders)](https://www.enchargeai.com/about-us) 4. [EnCharge AI LinkedIn Company Page](https://www.linkedin.com/company/encharge-ai) 5. [CB Insights Profile – EnCharge AI](https://www.cbinsights.com/company/encharge-ai) ## Other roles at EnCharge AI - [Staff Physical Design Engineer](https://feeny.ai/job/staff-physical-design-engineer-encharge-ai-us-vva2w6eepdbk) — Us-, Canada - [Technical Program Manager - Embedded Software](https://feeny.ai/job/technical-program-manager-embedded-software-encharge-ai-united-states-w18v49ve3s0r) — United States - [Principal Solutions Engineer](https://feeny.ai/job/principal-solutions-engineer-encharge-ai-united-states-vgghgxj68g9h) — United States - [Lead DFT Engineer](https://feeny.ai/job/lead-dft-engineer-encharge-ai-canada-united-states-q4ggksnf4q7g) — Canada / United States - [Senior PD Engineer: Synthesis & STA](https://feeny.ai/job/senior-pd-engineer-synthesis-sta-encharge-ai-bengaluru-wfbtaq6984et) — Bengaluru, India - [Senior Staff / Principal SOC Floorplan Lead](https://feeny.ai/job/senior-staff-principal-soc-floorplan-lead-encharge-ai-bengaluru-5rjzbdmx1e0r) — Bengaluru, India - [Staff Engineer: STA Methodology & Sign-off Lead](https://feeny.ai/job/staff-engineer-sta-methodology-sign-off-lead-encharge-ai-bengaluru-dnr9280vbw00) — Bengaluru, India - [Principal SOC Physical Verification & Integration Specialist](https://feeny.ai/job/principal-soc-physical-verification-integration-specialist-encharge-ai-bengaluru-z28meksf9r5v) — Bengaluru, India - [Staff / Senior Staff CAD & Methodology Engineer (Digital Implementation & Signoff)](https://feeny.ai/job/staff-senior-staff-cad-methodology-engineer-digital-implementation-signoff-bbfjk21sk0rk) — Bengaluru, India - [Research Engineer, AI Models](https://feeny.ai/job/research-engineer-ai-models-encharge-ai-germany-5kv1pnxdmybd) — Germany