--- title: 'System & Advanced Packaging Design Lead at Phizenix' canonical: 'https://feeny.ai/job/system-advanced-packaging-design-lead-phizenix-santa-clara-n8k5v8ngx7j7' type: 'job' last_seen: '2026-10-15' --- # System & Advanced Packaging Design Lead at Phizenix - **Company:** Phizenix - **Location:** Santa Clara, CA - **Compensation:** $180k–$200k - **Work type:** hybrid - **Posted:** 2026-10-12 - **Last confirmed live:** 2026-10-15 - **Apply:** https://job-boards.greenhouse.io/phizenix/jobs/5450006008 ## Job description ## Role Overview We are seeking an Advanced 2.5D/3D/Chiplet packaging Lead, who will be directing Signal Integrity for Package, PCB and System design for Copper Interconnects beyond 200G, Work on enabling advanced packaging for Driver, TIA & Optics for AI Scale up engine including SI/ PI, Reliability, Thermals and HVM; Also drive Micro-LED packaging and Heterogeneous package development. Good understanding of OSAT ecosystem and drive the development of complete solutions for data-centers ## Key Responsibilities Technical Leadership & Execution - Own package, PCB, and system-level signal integrity architecture for 200G+/lane copper interconnects (C2M, C2C, and cable assemblies) — from channel budgeting and topology definition through post-layout signoff and correlation with silicon measurements. - Drive 2.5D/3D and heterogeneous package development for co-packaged driver, TIA, and optical engines, including substrate architecture, interposer/bridge evaluation, and die–package co-design with the SerDes and analog design teams. - Lead micro-LED and photonic packaging development: optical coupling and alignment strategy, hermeticity and reliability, and thermal co-design with the optical engine. - Define and manage the OSAT and substrate supplier strategy — technology selection, DFM reviews, JEDEC qualification, yield ramp, and HVM readiness. - Own package-level power integrity and thermal strategy: PDN targets, decoupling plans, lid/TIM selection, and clear signoff criteria across programs. - Coordinate cross-functional execution across silicon design, product/test engineering, systems hardware, and manufacturing partners; run design reviews and manage schedule and risk. Hands-On Design - Personally drive substrate stackup definition, ballmap/pinmap optimization, and high-density breakout and escape routing studies for high-speed designs. - Perform 3D EM extraction and channel simulation (HFSS/Q3D, ADS or equivalent), S-parameter quality checks, and COM/IL/RL budgeting against IEEE 802.3 and OIF-CEI specifications. - Build and correlate PDN and thermal models spanning die, package, and board. - Lead lab characterization: VNA/TDR measurements, BER and eye-margin testing, model-to-measurement correlation, and failure analysis support. - Author package design guidelines, review checklists, and reference collateral used across product programs. Required Qualifications Education & Experience - Ph.D. in Electrical Engineering (or related) with 5+ years, OR M.S. with 8+ years of Advanced package development in high volume. - Proven experience leading teams to successful execution, with multiple products delivered in advanced CMOS nodes. Core Technical Skills - Deep SI/PI expertise for multi-GHz serial links: 112G/224G PAM4 channel design, COM analysis, crosstalk and mode-conversion control, and connector/cable interfaces. - Advanced packaging depth: FCBGA, RDL/fan-out, 2.5D interposers and silicon bridges, substrate design rules, and materials selection. - Fluency with industry tools: HFSS, Q3D, SIwave/PowerSI, ADS channel simulation, Cadence APD/Allegro (or equivalent), and thermal tools such as Icepak or FloTHERM. - Reliability and qualification: JEDEC standards, moisture sensitivity, thermo-mechanical stress, and warpage/coplanarity management for large-body packages. - Working knowledge of optics packaging: VCSEL/PD or silicon-photonics co-packaging, fiber and lens coupling, and active alignment concepts. Leadership & Program Skills - Track record leading small internal teams and external partners (OSATs, substrate vendors, contract labs) through complete product cycles into volume production. - Strong program discipline: schedule and risk management, structured design reviews, and clear documentation in a fast-moving environment. - Excellent cross-functional communication with silicon, systems, and executive stakeholders; comfortable presenting technical trade-offs to customers and partners. ## Preferred Qualifications - Experience with co-packaged optics, linear-drive optics, or active copper/electrical cable (ACC/AEC) products. - Micro-LED, VCSEL, or photonic device packaging experience. - Familiarity with UCIe and chiplet/die-to-die interconnect packaging. - Hands-on HVM ramp experience at leading OSATs (ASE, Amkor, JCET, or similar). - Prior startup experience or comfort operating with broad scope under resource constraints. California Pay Range $180,000—$200,000 USD ## About Phizenix ## Company Overview - **One-liner**: Phizenix provides workforce solutions for the AI era, including top tech talent placement, AI strategy & development, and AI workforce training. - **Entity Type**: Private (Pre-Seed / Bootstrapped – no public funding rounds disclosed) - **Headquarters**: Livermore, California, United States - **Founded**: 2025 - **Founders**: Khursheed Irani ## Core Business - **Primary industry**: IT Services and IT Consulting, AI Consulting, Workforce Staffing - **Target customers**: B2B – businesses seeking AI transformation, technical talent, and AI upskilling (mid-market to enterprise) - **Mission or purpose statement**: “We’re a team of tech founders, operators, and builders on a mission to help businesses thrive in an AI-native world. We believe AI should empower people, not replace them.” ## Products & Services - **[Talent Staffing]**: Executive recruiting, permanent hire, contract staffing and management for technical roles (e.g., AI/ML engineers, DevOps, firmware engineers). - **[AI Strategy & Development]**: Consulting to discover automation opportunities, design AI solutions, and build production AI systems. - **[AI Workforce Training]**: Live workshops and online certification programs to increase teams’ AI skills. ## Market Standing - **Valuation/Market Cap**: Not publicly available (private company, no funding rounds disclosed) - **Key Metric**: Not disclosed (revenue not public). Employees: 12 as of early 2026. - **Notable Investors/Partners**: No named investors; leadership includes Khursheed Irani (CEO), Raashid Mehasanewala (Head of Solutions), Jumana Ghadiali (VP Operations), Sanjay Dayal (Senior Technology Advisor), Aziz Ghadiali (Head of AI and Marketing). - **Growth Signals**: Headcount growth of +7.7% monthly (LinkedIn estimate); active job postings on Greenhouse (3 open roles as of 2026); LinkedIn follower count 3,587 with +3.9% monthly growth. ## Competitive Advantages - **AI-native focus**: Entire business model centered on AI transformation, not a general staffing firm. - **Silicon Valley presence**: HQ in Livermore, CA, with additional presence in India and Canada, allowing access to diverse talent pools. - **Experienced leadership team**: Founders and VPs bring 20+ years of combined experience in tech, operations, and AI. ## Strategic Focus - **Current priorities**: Expand AI consulting engagements, scale talent staffing pipeline, and grow the training certification arm. Emphasis on “AI-native future of work” – helping companies integrate AI alongside human teams rather than replacing them. ## Why Work Here - **Culture**: Small, mission-driven team focused on AI empowerment. Emphasis on “AI should empower people, not replace them.” - **Remote/Hybrid/Office**: Many roles are remote; some are hybrid in San Francisco/Bay Area (e.g., Director of Engineering – Shopify & ERP). Offices in Livermore, CA and Bengaluru, India. - **Notable perks/engineering culture**: Opportunity to work at the intersection of AI and business transformation; hands-on involvement in building AI solutions for clients; growth potential in a young, rapidly expanding company. ## Sources 1. [phizenix.com](https://www.phizenix.com/) 2. [phizenix.com/careers](https://www.phizenix.com/careers) 3. [phizenix.com/about](https://www.phizenix.com/about) 4. [LinkedIn/Phizenix](https://www.linkedin.com/company/phizenix) 5. [Greenhouse/Phizenix](https://job-boards.greenhouse.io/phizenix/jobs/5197144008) ## Other roles at Phizenix - [Staff Platform Engineer](https://feeny.ai/job/staff-platform-engineer-phizenix-remote-78t6ptxp5k2m) - [Principal Platform Engineer](https://feeny.ai/job/principal-platform-engineer-phizenix-remote-ft80cyews7qz) - [Confluence Solution Architect (French-speaking)](https://feeny.ai/job/confluence-solution-architect-french-speaking-phizenix-remote-2vhbd2xx35zj) - [Atlassian Cloud Migration Engineer](https://feeny.ai/job/atlassian-cloud-migration-engineer-phizenix-remote-9dffaxypx98x) - [Senior CMDB / ITOM Architect](https://feeny.ai/job/senior-cmdb-itom-architect-phizenix-contract-qzeq29hm6cem) — Contract - [SAM Pro / SaaS License Management Specialist](https://feeny.ai/job/sam-pro-saas-license-management-specialist-phizenix-remote-jxn63atae2sg) - [Senior Full stack Developer](https://feeny.ai/job/senior-full-stack-developer-phizenix-reston-597e44pvwent) — Reston, VA - [Full stack Developer](https://feeny.ai/job/full-stack-developer-phizenix-reston-asn25v3dewpy) — Reston, VA - [Junior DevSecOps Engineer](https://feeny.ai/job/junior-devsecops-engineer-phizenix-raston-fdxv245d0j11) — Raston, VA - [DevSecOps Engineer](https://feeny.ai/job/devsecops-engineer-phizenix-reston-ftye14vpzcz3) — Reston, VA