---
title: 'VP of Platform at Neurophos'
canonical: 'https://feeny.ai/job/vp-of-platform-neurophos-sunnyvale-t50459b84jd4'
type: 'job'
last_seen: '2026-09-07'
---

# VP of Platform at Neurophos

- **Company:** Neurophos
- **Location:** Sunnyvale, CA
- **Compensation:** $335k–$400k
- **Employment:** full-time
- **Work type:** onsite
- **Posted:** 2026-07-15
- **Last confirmed live:** 2026-09-07
- **Apply:** https://jobs.ashbyhq.com/neurophos/429da79f-a576-4927-8540-3313ddb1c021

## Job description

## ABOUT NEUROPHOS

The demand for new data centers and AI compute is rapidly outpacing the planet's energy capacity. Digital solutions are hitting a power wall as we approach the physical limits of traditional silicon. Conquering this bottleneck means rethinking the fundamental architecture of inference compute. The industry's current path can't meet the need, so we're taking a different approach.

Instead of traditional electronic circuits, we use silicon photonics and an active, programmable metasurface to perform matrix multiplications at the speed of light. Our optical cells are 10,000x smaller than traditional photonic components, enabling unprecedented density. By using photonics instead of electricity, our chips become more efficient as they scale. This architecture will deliver up to 100 times the energy efficiency of existing solutions while significantly improving performance for large-scale AI inference.

We’ve assembled a world-class team of industry veterans and recently raised a $110M Series A https://www.neurophos.com/110m-raise led by Gates Frontier. Participants include M12 (Microsoft’s Venture Fund), Carbon Direct Capital, Aramco Ventures, Bosch Ventures, Tectonic Ventures, Space Capital, and others.

Join us and shape the future of computing!

## POSITION OVERVIEW

The VP of Systems owns the development of our inference servers and rack and is responsible for the electrical, mechanical, and systems engineering aspects of designing and delivering our full-scale products. This role will own system development from the boards and interconnect through the end-to-end power and high-speed-channel budgets that make the design close, to full system bring-up. Everything needed to connect our optical processing units (OPUs) together, integrate them into the rack, and ensure the system boots, runs, and passes qualification. Reports to the SVP of Engineering.

## LOCATION

Austin, TX or Sunnyvale, CA. Full-time onsite position.

## KEY RESPONSIBILITIES

- Boards, interconnect & fabric: the accelerator baseboard, module carrier, and front-panel boards (with on-board power and signal & power integrity), the electrical interfaces between modules, the PCIe host interface, and the scale-out fabric (leaf/TOR topology, oversubscription, intra-rack cabling, frontend and management network).
- Electrical closure: the end-to-end power architecture from the rack DC inlet to point-of-load (regulation, transient budget, protection coordination) and the end-to-end high-speed channel budgets across the full link.
- Integration & bring-up: hardware/firmware/software system bring-up and board/system validation.
- System reliability: the top-down system RAS (reliability, availability, serviceability) budget and its flowdown to module allocations.
- Org & program: build and lead the Systems team and own schedule and budget.
- Phase gates: EVT/DVT/PVT design sign-off.

## QUALIFICATIONS

- Shipped server/rack products at volume through an ODM/OEM/CM or a hyperscaler/DGX-class program, with design ownership.
- Fluent from L1–L10. From component/PCB through full server-node assembly and validation.
- Extensive direct line management experience and have run a hardware engineering organization from near-scratch to scale.
- Real NPI scars — owned EVT/DVT/PVT gates, spin decisions, and qualification.
- Board & system-electrical depth — layout direction, on-board power, SI/PI, high-speed interfaces (PCIe Gen6/7, Ethernet/OSFP), and validation.
- End-to-end channel & power closure — with owned link budgets for high-speed interfaces (PCIe Gen6/7, 800G+ Ethernet) and an end-to-end power architecture, not just board-level SI/PI.
- Operates well in a defined-interface organization — comfortable owning deep electrical authority while designing to interface definitions and product envelopes set by other teams.
- System-architecture ownership — has owned or led rack/tray/board architecture.
- 15+ years hardware development — BS/MS in EE/ME or equivalent track record.

## PREFERRED SKILLS

- Rack/cluster integration (L11/L12) for AI training/inference deployments.
- Scale-out fabric/networking depth: Ethernet leaf-spine, OSFP, RDMA/RoCE.
- OCP experience: OAM/UBB and ORv3 rack power; contributor a plus.
- 0→1 startup experience or adjacency to optical/photonic/analog-heavy systems.

## WHAT WE OFFER

This is an opportunity to play a pivotal role in an innovative startup redefining the future of AI hardware. Work on game-changing technology at the intersection of photonics and AI as part of a collaborative, brilliant team. You’ll contribute to a platform that redefines computational performance and accelerates the future of artificial intelligence. Come help us bring this transformative technology to the world.

## BENEFITS

Join a team that invests in your future and your well-being. At Neurophos, we offer:

- 100% coverage of base health plan premiums for you and your dependents, plus HSA contributions.
- Unlimited PTO. No rigid vacation banks, just a focus on delivery.
- 401(k) matching and stock option opportunities to ensure our success is your success.
- Full suite of voluntary benefits, including Dental, Vision, Life, Hospital, Critical Illness, and Accident insurance.
- Personalized Benefits. Choose the plans that fit your life and take the cash back for those that don’t.

## About Neurophos

## Company Overview
- **One-liner**: Neurophos develops photonic AI chips (Optical Processing Units) that perform matrix multiplications at the speed of light, aiming to replace traditional GPUs in data-center inference workloads.
- **Entity Type**: Private, Series A
- **Headquarters**: Austin, Texas, USA (with an additional office in San Jose, California)
- **Founded**: 2020
- **Founders**: Patrick Bowen (CEO, Co-Founder) and Andrew Traverso (Chief Scientist, Co-Founder); other co-founders may include Preston Woo and Hod Finkelstein (CEO, CTO roles indicated on team page).

## Core Business
- **Primary industry**: Semiconductor / Photonic AI Hardware
- **Target customers**: B2B – hyperscale data centers, enterprise AI infrastructure providers
- **Mission/purpose**: “We’re building the first programmable light-speed computer” – solving energy and scalability challenges in AI data centers by using optical rather than electronic computation.

## Products & Services
- **Optical Processing Unit (OPU)**: A photonic AI chip that integrates over one million micron-scale optical processing components on a single die. It performs matrix multiplications in-memory at the speed of light, delivering up to 100x the energy efficiency of traditional GPUs and NVIDIA servers while fitting in a single-GPU form factor. The chip uses an active, programmable metasurface and silicon photonics to achieve 0.47 ExaOPS performance in a 1m x 1m footprint. First systems are targeted for early 2028, with production ramp in mid-2028.

## Market Standing
- **Valuation/Market Cap**: Not disclosed
- **Key Metric**: Total funding raised = **$119.2M** (including a $110M Series A closed in early 2026)
- **Notable Investors**: Gates Frontier (lead), M12 (Microsoft’s venture fund), Carbon Direct Capital, Aramco Ventures, Bosch Ventures, Tectonic Ventures, Space Capital, MetaVC Partners, Gaingels, Mana Ventures, and 22+ others.
- **Growth Signals**: 
  - Recognized on EE Times Silicon 100 list for several consecutive years.
  - Over 300 patents filed and protected.
  - Rapid hiring after Series A – “hypergrowth phase” as per press release.
  - Team includes veterans from NVIDIA, AMD, Apple, Meta, Google, Magic Leap, Micron, Qualcomm, Samsung, and other photonic/AR companies.

## Competitive Advantages
- **Metasurface optical transistors** that are **10,000x smaller** than traditional photonic components, enabling unprecedented density – millions of weights fit in the area of a postage stamp.
- **300+ patents** covering optical metamaterials, neural network accelerators, and machine learning hardware.
- **Energy efficiency**: Up to 100x improvement over existing electronic solutions (e.g., GPUs), directly addressing the power constraints of hyperscale AI inference.
- **Size/performance**: OPU delivers the performance of a 3,000-pound server in the size and power envelope of a single GPU.

## Strategic Focus
- **Commercialization**: First customer evaluations begin in 2026; first OPU systems target early 2028 production ramp.
- **Talent acquisition**: Scaling the team aggressively across analog design, photonics, architecture, and software to meet “hypergrowth” demand.
- **Partnerships**: Leveraging investors like Bosch Ventures (industrial IoT), Aramco Ventures (energy), and M12 (cloud/AI) to align with large-scale data center customers.

## Why Work Here
- **Culture**: In-office, on‑site work culture in Austin, TX (primary) and San Jose, CA. Described as a “world-class team” with leaders from top semiconductor and tech companies.
- **Growth**: Joining at a hypergrowth scale‑up stage with significant funding and a clear path to production; opportunities to shape the architecture and engineering of a new computing paradigm.
- **Engineering focus**: 34 out of 40 total employees are in product + tech roles, indicating a highly technical, R&D-driven environment.
- **Impact**: Work on cutting-edge optical computing that could redefine AI hardware efficiency; involvement in everything from silicon photonics to compiler software.
- **Notable perks**: Not explicitly listed, but being a well-funded deep-tech startup likely offers competitive equity, technical challenges, and direct mentorship from industry veterans.

## Sources
1. [neurophos.com](https://www.neurophos.com/)
2. [neurophos.com/careers](https://www.neurophos.com/careers)
3. [neurophos.com/team](https://www.neurophos.com/team)
4. [cbinsights.com](https://www.cbinsights.com/company/neurophos)
5. [builtin.com](https://builtin.com/company/neurophos)

## Other roles at Neurophos

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- [Modeling Architect](https://feeny.ai/job/modeling-architect-neurophos-austin-ew2q0rxv7e3b) — Austin, TX
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