
PD Intern at Etched (San Jose, CA)
Etched· San Jose, CA·
Role details
12-Week Paid Internship · Generous Housing Support · Daily Lunch And Dinner · Direct Mentorship From Industry Leaders · Opportunity To Work On Important AI Problems
Etched at a glance
Transformer-specific ASICs and rack-scale systems that hardwire the transformer into silicon for faster, cheaper AI inference.
Etched designs transformer-specific ASICs and full rack-scale inference systems. Its Sohu chip hardwires the transformer architecture directly into silicon, trading a GPU's general-purpose flexibility for far higher throughput, lower latency, and better power efficiency on AI inference. Customers buy complete co-designed clusters, chip plus rack plus software, not standalone chips.
$800M raised · latest: $500M · led by Stripes · Dec 2025 (reported Jan 2026) · backed by Stripes, Peter Thiel, Ribbit Capital, VentureTech Alliance
Summary
As a Physical Design intern, you will realize front-end designs in silicon by developing physical design flows, synthesizing blocks, and automating design checks. You will advise RTL design decisions and assist in improving iteration speed to final signoff for Etched's AI inference systems.
Job description
About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As a Physical Design intern for Etched, you will be responsible for realizing our front-end designs in silicon, helping Etched to improve iteration speed to final signoff. You will assist in developing and running Physical Design flows to synthesize blocks, automate final design checks, and advise RTL design decisions. We are looking for Fall '26, Spring '27, and Summer '27 interns.
You may be a good fit if you have
- Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field.
- Familiarity with high-speed digital logic
- Exposure to ASIC or SoC design concepts
- Familiarity with SystemVerilog, UVM, or Python
- Familiarity with verification work and writing test benches
- Familiarity with physical design flows and tooling
- Are able to learn quickly about transformers and other aspects of modern artificial intelligence
Strong candidates may also have experience with
- Familiarity with modern ML and LLM model architectures
- Familiarity with numerical representations and functions (RTL)
- Familiarity with clocking and reset schemes (RTL/PD)
- UVM or formal verification experience (DV)
- Ability to program with Python or another scripting language
We encourage you to apply even if you do not believe you meet every single qualification.
Program details
- 12-week paid internship
- Generous housing support for those relocating
- Daily lunch and dinner in our office
- Based at our office in San Jose, CA
- Direct mentorship from industry leaders and world-class engineers
- Opportunity to work on one of the most important problems of our time
For any questions, contact internships@etched.com
How we’re different
Etched believes in the Bitter Lesson incompleteideas.net/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
Why work at Etched
- Mission-driven, high-impact engineering: “Building the hardware for superintelligence” – the company is solving one of the hardest problems in compute (inference efficiency) with a focused team.
- Top-tier team and learning environment: Colleagues from Google, NVIDIA, Apple, Tesla, Broadcom, and Intel; exposure to full-stack chip-to-system design.
- In-office culture: All roles are in-office (Cupertino and San Jose, CA). The company emphasizes on-site collaboration for hardware development. Notable perks are not heavily advertised, but compensation is competitive for the AI hardware space (equity-heavy).
- Growth trajectory: 141% headcount growth YoY, hundreds of open roles, and a $5B valuation signal strong backing and career acceleration potential.
- Intellectual challenge: Work on chip simulation, RTL design, system validation, or software infrastructure for cutting-edge AI inference.