PD SC-USA Remote at Baya Systems (Austin, TX / Santa Clara, CA)PD SC-USA Remote

Baya Systems is inspired by the baya bird, also known as the weaver. Baya birds weave very unique and intricate hanging nests from different materials. The nests are robust and safe while being extremely lightweight and efficient.

Baya is a fast-moving Series B startup built by serial entrepreneurs with a vision to accelerate intelligent computing in the emerging chiplet era.  We focus on software-driven, unified fabric solutions for single-die and multi-die systems. We design and license disruptive intellectual property for use in semiconductor chips, with software development platforms to simplify the design process and reduce the time to market for complex System-on-Chip (SoC) and multi-chiplet systems. This enables our partners to innovate and deliver compelling solutions for data center, infrastructure, AI, Automotive, and Edge IoT markets. We are looking for energetic and dedicated individuals share our passion for enabling innovation and excellence in the semiconductor industry that empowers game-changing products and services!

Baya Systems, Inc:

Baya Systems, Inc seeks Principal Engineer-Physical Design. This Job is a fully remote position, and candidates can work anywhere in the US.

Company headquarters is located at 5201 Great America Parkway Suite 100, Santa Clara, CA 95054.

The position requires a bachelor's degree or foreign equivalent in Electrical Engineering or Computer Engineering or related degree and 5 years of experience in Job Offered or as Project Engineer, Senior Project Engineer, Design Engineer or another closely related field and the following skills:

Experience in floor planning, physical design validation, clock trees, physical design flow automation, ICC, and SoC Architecture.

Job Duties:

Own RTL to GDS physical implementation flows for synthesis, floor-planning, place and route, clock tree synthesis, timing & power closure, EM/IR, PDV and final PD sign off; Own physical design & implementation of high-performance designs from block level to system level components; Deep collaboration with Micro-architects to explore performance, power and area trade-offs for high performance and low power designs; Physical implementation feasibility studies and design recommendations for best PPA develop methodologies and recipes for various stages of physical implementation; Perform various physical design validation PDV) flows for Timing, Power, EM/IR, etc. to ensure physical design quality, Perform design rule checking (DRC), (LVS) checks, and other physical verification tasks.