Principal Advanced Packaging Engineer at Astera Labs (San Jose California, United States)

Astera Labs· San Jose California, United States·12h ago

Job description

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.

Location: San Jose, CA (On-site).

About the Role

Astera Labs is seeking a Principal Advanced Packaging Engineer to lead R&D for next-generation packaging technologies for optical chips. This is a senior individual contributor role focused on setting technical direction and driving packaging technology development for NPO and CPO products.

Responsibilities

Lead R&D for advanced packaging of optical chips, including 2.1D, 2.5D, and 3D integration.
Define and optimize wafer-level, panel-level, or die-level packaging process flows.
Drive EIC-to-PIC integration and broader optical device integration efforts.
Select and qualify packaging materials for advanced packaging.
Partner with OSAT, tool vendors, and material suppliers to drive equipment, process, and materials development.
Characterize and continuously improve yield, reliability, and process capability for NPO and CPO packages.
Develop and maintain packaging PDKs and design rules for NPO and CPO products.

Basic Qualifications

B.S., M.S., or Ph.D. in Electrical Engineering, Materials Science, Mechanical Engineering, or a related field.
8+ years of experience in semiconductor or advanced packaging engineering, with demonstrated technical leadership.
Deep expertise in advanced packaging processes, including 2.5D/3D integration, flip-chip, hybrid bonding, Cu pillar, TSV, RDL, and overmold across wafer-, panel-, and die-level flows.
Experience with silicon photonics chip packaging and EIC/PIC integration.
Hands-on experience with advanced packaging materials, including underfill, molding compounds, dielectrics, adhesives, or optical-grade encapsulants.
Proven track record of equipment and process qualification with OSAT or tool suppliers.
Experience with PDK development and packaging design rule authoring.
Strong foundation in yield analysis, reliability characterization, and process capability methodologies such as Cpk and SPC.

Preferred Qualifications

Hands-on experience with CPO or NPO product development.
Experience with optical coupling or waveguide alignment for photonic integration.
Familiarity with DFM and DFT for advanced packaging.

Salary range is $205,000 to $260,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives and benefits.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

Why work at Astera Labs

Culture: Described as collaborative, ownership-driven, and focused on solving complex problems together. The company emphasizes diversity and inclusion as drivers of creativity and innovation.
Growth: Astera Labs supports non-linear career growth—employees can deepen expertise (“scale up”) or broaden into new areas (“scale out”). 92% YoY headcount growth signals rapid expansion and opportunity.
Remote/Hybrid: Not explicitly stated, but global operations across 12 countries (including India, Canada, Israel, Taiwan, Vietnam) suggest a flexible, distributed work model.
Benefits: Competitive medical, dental, and vision plans; flexible time off; family planning and parental leave; 401K and retirement plans.
Engineering culture: Strong focus on cutting-edge semiconductor and AI infrastructure technology. High concentration of senior (24%) and specialist (19%) talent. Active internship and new graduate programs.
Employee ratings: 4.5/5.0 on LinkedIn (124 reviews), with high marks for compensation (4.6), culture (4.4), and career development (4.4).

About Astera Labs

Company Overview

One-liner: Astera Labs designs and delivers semiconductor-based connectivity solutions purpose-built to unleash the full potential of cloud and AI infrastructure.
Entity Type: Public (Nasdaq: ALAB)
Headquarters: Santa Clara, California, United States
Founded: 2017
Founders: Jitendra Mohan, Sanjay Gajendra, Casey Morrison

Core Business

Primary industry: Semiconductor manufacturing / AI infrastructure connectivity
Target customers: B2B, primarily hyperscale cloud providers and system OEMs (e.g., NVIDIA, AMD, Intel)
Mission statement: To innovate, design, and deliver semiconductor-based connectivity solutions that are purpose-built to unleash the full potential of cloud and AI infrastructure.

Products & Services

Aries PCIe®/CXL™ Smart DSP Retimers: Silicon ICs, boards, and modules that digitally recover degraded high-speed signals to extend reach and enable higher PCIe/CXL data bandwidth between compute, storage, and network controllers.
Taurus Ethernet Smart Cable Modules™: Hardware modules that increase network connectivity bandwidth between servers and switches over copper media, removing rack-level Ethernet bottlenecks.
Leo CXL Memory Connectivity Controllers: ICs and boards that expand, share, and pool DRAM memory to overcome processor memory bandwidth bottlenecks for AI workloads.
Scorpio Smart Fabric Switches: A family of PCIe 6 fabric switches ranging from 32 to 320 lanes, including the new 320-lane Scorpio X-Series Fabric Switch for AI scale-up fabrics.
COSMOS Software Suite: A connectivity system management and optimization software that enables configuration, monitoring, troubleshooting, and predictive analytics for all Astera Labs products.

Market Standing

Market Cap: ~$11.6 billion (as of mid-2026)
Key Metric - Revenue: $35 million (annual, reported)
Key Metric - Operating Income: $173.4 million (2025)
Key Metric - Net Income: $219.1 million (2025)
Total Funding: ~$810.75 million (pre-IPO), with Series C ($50M, led by Fidelity) and Series D ($150M, led by Fidelity)
IPO Date: March 20, 2024
Notable Investors/Partners: Fidelity, NVIDIA, Advanced Micro Devices, Intel, major hyperscalers
Growth Signals: 92% YoY headcount growth (675 employees); 144 active job postings (+260% YoY); expanded Taiwan operations with a new Cloud-Scale Interop Lab in 2026; shipping millions of devices across all major hyperscalers; 300+ design wins.

Competitive Advantages

First-to-market innovation: Pioneered first-to-market PCIe, Ethernet, and CXL connectivity products.
Patented software-defined platform approach: Differentiates via a platform that combines silicon hardware with embedded COSMOS software, enabling flexibility, observability, and predictive analytics.
Deep hyperscaler relationships: Trusted partner to the world’s largest cloud providers, with proven interoperability validated in their own Cloud-Scale Interop Lab.
Broad product portfolio: Covers PCIe retimers, Ethernet cable modules, CXL memory controllers, and fabric switches—addressing the full spectrum of AI connectivity bottlenecks.
Strong IP and engineering talent: 443 employees in technical roles; talent sourced from Intel (65), Marvell (37), Texas Instruments (40), AMD (22), and NVIDIA.

Strategic Focus

Scaling AI infrastructure: Expanding product portfolio and global footprint (12 countries) to meet surging demand for rack-scale AI.
Open standards leadership: All products are grounded in open standards (PCIe, CXL, Ethernet), ensuring interoperability and broad adoption.
Taiwan expansion: Growing engineering presence and Interop Lab in Taiwan to strengthen integration with leading AI platform providers and system manufacturers.
Continued innovation: Shipping the new 320-lane Scorpio X-Series Fabric Switch and expanding the COSMOS software suite for fleet-level management and optimization.

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