
Chip Lead: Analog & Mixed-Signal Layout Engineer at Omni Design Technologies (Milpitas, CA)
Omni Design Technologies· Milpitas, CA·
Role details
Job description
The senior analog & mixed-signal layout designer will be responsible for the layout of cutting edge, high performance, high speed CMOS data converters in foundry CMOS process nodes in 2nm, 3nm, 5nm, 6nm, 7nm, 16nm, and 28nm.
Qualifications
- 10+ years experience in high performance analog layout in advance Finfet/CMOS process nodes
- Experience with layouts of high performance and high speed analog blocks (such as ADC, DAC, PLL, and SERDES, for example)
- Should be able to lead the project
- Experience with analog layout techniques such as common centroid, interdigitation, shielding, dummy devices, EM aware routing on critical block, and must be versed with with VXL compliant methodology
- Familiarity in various physical verification checks DRC, LVS, DFM, ERC, EM, IR etc.
- Layout Automation using SKILL/PERL/Python is a plus
- Self starter with the ability to define and adhere to schedule and methodology
- Must possess strong social skill and be an excellent team mate
We are looking for trailblazers ...
We strongly believe that the pace of the ongoing hardware revolution will be greatly accelerated by Omni Design’s IP cores and the rapidly emerging semiconductor embedded design business ecosystem.
At Omni Design, we have created an exciting environment with amazing talent across multiple disciplines. We like self-motivated individuals, we encourage initiative, we look for leadership qualities, we value teamwork, we like diversity, and we reward excellence. We are looking for trailblazers to bring Omni Design’s vision to fruition.
If you are interested in making an impact as part of a young, fast growing, cutting edge technology company, please reach out to us.
Omni Design is an equal opportunity employer. We offer excellent compensation. We seek individuals that share our high standards and commitment to excellence.
Why work at Omni Design Technologies
- Culture & Ratings: 5.0/5.0 employer rating (2 reviews) with 5.0 for compensation, culture, and career growth, and 4.0 for work‑life balance. linkedin.com
- Team & Talent: Co‑founded by an MIT PhD; CTO is a Stanford PhD; engineering team includes alumni from Apple, Qualcomm, Texas Instruments, MaxLinear, and other top semiconductor firms.
- Growth Trajectory: Doubling headcount rapidly (+920% job posting growth YoY), strong funding, and tier‑one customer wins – clear momentum.
- Global Presence: Design centers in the US (CA, CO, MA) and India, with distributed teams across six countries. Likely hybrid/on‑site at offices (not explicitly stated).
- Innovation Focus: Work on cutting‑edge analog/mixed‑signal IP for AI, 5G, quantum computing – high technical challenge and impact.
- Current Openings (51 roles): Senior Analog Design, DSP Architect, SerDes Architect, Applications Engineer, Systems Lead, and more. jobs.lever.co