
DFT Intern at Etched (San Jose, CA)
Etched· San Jose, CA·
Role details
Etched at a glance
Transformer-specific ASICs and rack-scale systems that hardwire the transformer into silicon for faster, cheaper AI inference.
Etched designs transformer-specific ASICs and full rack-scale inference systems. Its Sohu chip hardwires the transformer architecture directly into silicon, trading a GPU's general-purpose flexibility for far higher throughput, lower latency, and better power efficiency on AI inference. Customers buy complete co-designed clusters, chip plus rack plus software, not standalone chips.
$800M raised · latest: $500M · led by Stripes · Dec 2025 (reported Jan 2026) · backed by Stripes, Peter Thiel, Ribbit Capital, VentureTech Alliance
Job description
About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary As a DFT Intern at Etched, you will help review and refine DFT flow automation to support chip-level regression on Caelius. You will work across frontend and backend design teams, contribute to DFT verification (including MBIST, Scan, BSCAN, and SSN simulations), and develop flows for various ATPG fault models. You do not necessarily need prior DFT experience; just the ability to learn quickly in a fast-paced, high-autonomy environment. We are looking for Spring '27, and Summer '27 interns.
You may be a good fit if you have
- Progress towards a Bachelor's, Master's, or PhD degree in electrical engineering, computer engineering, or a related field.
- Familiarity with a hardware description language (Verilog or SystemVerilog)
- Exposure to ASIC or SoC design concepts
- Familiarity with digital logic design fundamentals
- Familiarity with standard ASIC design flow steps (synthesis, STA, DFT)
- Familiarity with scripting in Python, Tcl, or another language
- Are able to learn quickly about transformers and other aspects of modern artificial intelligence
Strong candidates may also have experience with
- Knowledge of DFT concepts such as MBIST, scan insertion, and scan compression
- Experience with Tessent or similar DFT tooling
- Familiarity with ATPG fault models (SAF, TDF, BDF, IDDQ, PDF)
- Exposure to DFT flow automation or regression infrastructure
- Familiarity with clocking and reset schemes
We encourage you to apply even if you do not believe you meet every single qualification.
Program details
- 12-week paid internship
- Generous housing support for those relocating
- Daily lunch and dinner in our office
- Based at our office in San Jose, CA
- Direct mentorship from industry leaders and world-class engineers
- Opportunity to work on one of the most important problems of our time
For any questions, contact internships@etched.com.
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
Why work at Etched
- Mission-driven, high-impact engineering: “Building the hardware for superintelligence” – the company is solving one of the hardest problems in compute (inference efficiency) with a focused team.
- Top-tier team and learning environment: Colleagues from Google, NVIDIA, Apple, Tesla, Broadcom, and Intel; exposure to full-stack chip-to-system design.
- In-office culture: All roles are in-office (Cupertino and San Jose, CA). The company emphasizes on-site collaboration for hardware development. Notable perks are not heavily advertised, but compensation is competitive for the AI hardware space (equity-heavy).
- Growth trajectory: 141% headcount growth YoY, hundreds of open roles, and a $5B valuation signal strong backing and career acceleration potential.
- Intellectual challenge: Work on chip simulation, RTL design, system validation, or software infrastructure for cutting-edge AI inference.