Silicon Validation, Test & Characterization Engineer (title will reflect experience) at Eliyan (Bay Area)Silicon Validation, Test & Characterization Engineer (title will reflect experience)

Eliyan is building NuLink, a proprietary die-to-die chiplet interconnect fabric purpose-built for AI infrastructure at hyperscale.  We are seeking a highly skilled engineer to execute high speed silicon validation efforts, ensuring our silicon platforms deliver industry-leading performance, quality, and reliability. You will work with a cross-functional team of industry experts that operate from first principles, innovate, and push the envelope to create high-volume and high-performance manufacturable products. We offer a fun work environment with excellent benefits. Position Overview: As a Silicon Validation Engineer, you will be a technical owner to drive early silicon bring-up, post-silicon validation strategy, and hands-on execution for high-speed interconnects such as multi-Gbps SerDes and PHYs. You will work closely with design, architecture, and systems teams to ensure seamless bring-up, thorough validation coverage, and successful productization of complex silicon solutions.

Key Responsibilities:

• Execute early silicon bring-up activities, including system initialization, validation infrastructure development, and test content creation for high-speed interfaces.
• Define and drive comprehensive post-silicon validation plans for multi-Gbps SerDes, PHYs, and associated interconnect technologies (e.g., PCIe, CXL, Ethernet, DDR).
• Develop robust automation frameworks and test scripts (e.g., Python, TCL) to improve validation efficiency and coverage.
• Perform advanced electrical and protocol-level validation, including BER testing, jitter and eye diagram analysis, compliance testing, and margin assessments.
• Correlate lab measurements with pre-silicon simulations and design expectations; drive debug and closure on discrepancies, identify and root-cause silicon, package, and board-level issues.
• Work cross-functionally with design, architecture, system, and product engineering teams to optimize validation coverage and drive design-for-validation improvements.
• Document validation results, issues, and recommendations in detailed technical reports and communicate findings clearly to engineering and executive leadership.
• Support manufacturing and test engineering teams with validation methodologies to enable production ramp and customer readiness.

Qualifications:

• 3+ years of experience
• Expertise in chip bring-up, post-silicon validation, and debug of high-speed interconnects
• (e.g., PCIe, CXL, Ethernet, DDR, SerDes).
• Hands-on experience with high-speed lab equipment (high-bandwidth oscilloscopes, BERT, DCA, VNAs, TDRs) and associated validation methodologies.
• Fundamentals in signal integrity (SI), power integrity (PI), clock architectures, analog and mixed-signal, high speed DAC and ADC, equalization (CTLE, DFE), and link training protocols.
• Ability to correlate silicon measurements to design simulations and models and drive systematic debug.
• Strong scripting and automation skills (Python preferred).
• Experience in PCB/evaluation board validation is a plus.
• Excellent analytical, communication, and leadership skills.
• MS or PhD in electrical engineering, computer engineering, physics or related fields